Announcement

Collapse
No announcement yet.

Intel "coIOMMU" Can Help With Performance For VMs When Using Direct I/O Access

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • Intel "coIOMMU" Can Help With Performance For VMs When Using Direct I/O Access

    Phoronix: Intel "coIOMMU" Can Help With Performance For VMs When Using Direct I/O Access

    Currently when directly assigning I/O devices to virtual machines the guest memory needs to be statically pinned unless using a vIOMMU setup in which case it does not but there are performance implications there as well. Intel engineers though have been working on a virtual IOMMU implementation with DMA buffer tracking to overcome these limitations...

    http://www.phoronix.com/scan.php?pag...l-coIOMMU-2020

  • #2
    IOMMU is useful for what? It has been compared to GART function in AGP technology.

    Comment


    • #3
      Originally posted by Azrael5 View Post
      IOMMU is useful for what? It has been compared to GART function in AGP technology.
      GPU passthrough.

      Comment


      • #4
        Michael While I hadn't clicked on this article or looked at the comments, I got a notification about the first post being made. Just thought it was odd and worth mentioning since that's never happened before.

        Comment


        • #5
          Originally posted by Azrael5 View Post
          IOMMU is useful for what? It has been compared to GART function in AGP technology.
          I use it to passthrough GPUs, NVME disks, SATA optical disks, NVME, SATA, and SCSI controllers, and USB controllers. It works amazingly well, with my VMs achieving 94% to 97% the performance of bare metal.

          Comment


          • #6
            Small typo: widely-applicble, -> "a" missing :-)

            Comment


            • #7
              Initial support for IOMMU landed in Core2 Quad, although implemenation wasn't very good back then.

              I've been using it in servers and gaming machines for 7 years. It's very underrated technology IMO. It basically allows you to isolate hardware from your host OS.

              Comment


              • #8
                So this coIOMMU is going to be only available to Intel processors supporting a new Vt-d extension? Or is AMD going to be able to support it too?

                Comment


                • #9
                  Originally posted by polarathene View Post
                  So this coIOMMU is going to be only available to Intel processors supporting a new Vt-d extension? Or is AMD going to be able to support it too?
                  Unclear, the technique shouldn't be exclusive, and meant to leverage existing vt-d extension w/some driver magic, or operate entirely as a virtual IOMMU with KVM.

                  Full paper below

                  https://www.usenix.org/system/files/atc20-tian.pdf

                  Comment


                  • #10
                    Originally posted by WorBlux View Post

                    Unclear, the technique shouldn't be exclusive, and meant to leverage existing vt-d extension w/some driver magic, or operate entirely as a virtual IOMMU with KVM.

                    Full paper below

                    https://www.usenix.org/system/files/atc20-tian.pdf
                    Thanks for that, seems the article might need to be corrected then:

                    "Intel's proof-of-concept coIOMMU implementation is an extension of Intel VT-d" vs the papers "In our prototype, we build coIOMMU by extending an existing vIOMMU, which emulates the Intel VT-d hardware".

                    Still not sure how well that works with AMD-Vi, but good to know it'd work with existing Intel VT-d capable CPUs. I assume that AMD CPUs don't use vIOMMU emulating VT-d, but would be their own equivalent extension. I'm sure when available, Michael can probably clarify that with a benchmark article

                    Comment

                    Working...
                    X