AMD Ryzen 3 Rolls Out, Linux Benchmarks Coming

[schmidtbag]

Just my opinion here guys, but I think every DIMM of every kind over 1GB should be required to be ECC. Period. It should have been done a loong time ago.

Why? I have been perfectly fine with non-ECC and un-buffered RAM with no issues whatsoever. I'm glad to be paying less for effectively a 0% difference in my workload. I think ECC is important for servers and some workstations, but beyond that it's a pointless expense. RAM is very reliable nowadays, especially ones with heatsinks (since they act as some degree of EMI shielding).

However, I do think that all x86 CPUs should support ECC.

[chithanh]

The problem is that once one company does it everyone has to do it,

AMD traditionally didn't do it I think. Now AMD disables SMT and Ryzen PRO features on certain models.

The problem is that such market segmentation pisses the heck off of your customers. Intel was taking it too far, I hope that AMD will know when to stop.

[chithanh]

Why? I have been perfectly fine with non-ECC and un-buffered RAM with no issues whatsoever.

How do you know? One problem is silent data corruption. Without ECC, you won't even notice if a memory bit flipped.

I'm glad to be paying less for effectively a 0% difference in my workload. I think ECC is important for servers and some workstations, but beyond that it's a pointless expense. RAM is very reliable nowadays, especially ones with heatsinks (since they act as some degree of EMI shielding).

ECC is maybe not important for pure media consumption devices. But every computer that handles data which should not become corrupted needs ECC.

[torsionbar28]

Sweet, didn't AMD say they won't disable ECC on any of the Ryzen CPUs? If so one of these may end up in a future NAS of mine

Not disabled, but not officially supported either. The feature exists, but is not part of platform validation. And it's up to the individual mobo makers whether or not to implement the feature in their BIOS.

Better bet is to wait for the Epyc 5000 and 3000 series, which will officially support ECC, and be priced lower than comparable intel E5 and E3.

Or you can pickup a cheap supermicro H8SCM mobo for $50 from ebay, and an Opteron 4365 for $25 from ebay, and enjoy a proper server platform with ECC support and only 40w TDP, for peanuts price. It's what I did.

[torsionbar28]

Why? I have been perfectly fine with non-ECC and un-buffered RAM with no issues whatsoever.

I'm not sure you can make that claim. Without ECC, you have no way of knowing - that's the point of ECC. What you may experience without ECC is called "silent corruption" because it happens without any indication. If a bit flips in an active program, you may get weird behavior or a crash. But if a bit flips in a file cache or i/o buffer, you now have corrupt data and don't even know it.

Unbuffered vs. Registered is a different thing altogether not related to data integrity.

[schmidtbag]

How do you know? One problem is silent data corruption. Without ECC, you won't even notice if a memory bit flipped.

Right, because it's insignificant. I don't care if it happens - it's a rare fluke, and if it happened enough to be a problem then the RAM is simply defective; ECC isn't going to compensate for damaged hardware.

ECC is maybe not important for pure media consumption devices. But every computer that handles data which should not become corrupted needs ECC.

Considering the immense improbability of data being corrupted, I'm fine with taking my chances and I have no problem building PCs for people without ECC.

I'm not sure you can make that claim. Without ECC, you have no way of knowing - that's the point of ECC. What you may experience without ECC is called "silent corruption" because it happens without any indication. If a bit flips in an active program, you may get weird behavior or a crash. But if a bit flips in a file cache or i/o buffer, you now have corrupt data and don't even know it.

Fair enough - but of all data I have compiled, saved, edited, previewed, etc, none of it has ever posed a problem for me.

If people want to go for ECC, that's fine - you do you. But to claim that it should be required is ridiculous. Even value RAM is extremely reliable.

[duby229]

Right, because it's insignificant. I don't care if it happens - it's a rare fluke, and if it happened enough to be a problem then the RAM is simply defective; ECC isn't going to compensate for damaged hardware.

Considering the immense improbability of data being corrupted, I'm fine with taking my chances and I have no problem building PCs for people without ECC.


Fair enough - but of all data I have compiled, saved, edited, previewed, etc, none of it has ever posed a problem for me.

If people want to go for ECC, that's fine - you do you. But to claim that it should be required is ridiculous. Even value RAM is extremely reliable.

And that's exactly the problem, you never had problems, but they did happen. Like I said, it's just my opinion, So I understand it's not the way I'd like it to be.

EDIT: It's similar to, If a tree fell in the woods and noone witnessed it, does it matter that the tree fell? I answer that yes it matters, because we're not talking about a tree in the woods, we're talking about computer memory.

[chithanh]

Right, because it's insignificant. I don't care if it happens - it's a rare fluke, and if it happened enough to be a problem then the RAM is simply defective; ECC isn't going to compensate for damaged hardware.

But you cannot tell if your memory is damaged if you don't have ECC.

Considering the immense improbability of data being corrupted, I'm fine with taking my chances and I have no problem building PCs for people without ECC.

A Google study in 2009 found error rates of 8% per DIMM per year for server memory. Age of the memory chips was a significant factor.
This means even memory which appears to work fine during initial memtest86 burn-in can develop problems later on. By the time you notice, it may already be too late and data corruption spread to your backups or affected filesystem structures.

Then you have the problem of attackers intentionally provoking memory errors like in Rowhammer. This has been demonstrated to allow compromise of virtual machines running on the same host. DDR4 memory was once thought to be somewhat resistant against Rowhammer, but no longer.

If people want to go for ECC, that's fine - you do you. But to claim that it should be required is ridiculous. Even value RAM is extremely reliable.

ECC is required where you cannot afford silent corruption of your data.

[kylew77]

Why would AMD disable SMT on purpose on the Ryzen 3? Wouldn't they have to deliberately damage the dies to do so? Wish they wouldn't because then 8 threads would be the lowest common denominator meaning even the lowly netbook would have 8 threads and programs would start being optimized for more than duel core/ quad core parts.

[duby229]

Why would AMD disable SMT on purpose on the Ryzen 3? Wouldn't they have to deliberately damage the dies to do so? Wish they wouldn't because then 8 threads would be the lowest common denominator meaning even the lowly netbook would have 8 threads and programs would start being optimized for more than duel core/ quad core parts.

Not damage exactly, but disabled yeah. And yeah, I agree with you it makes total sense.