92 Patches Later: Experimental NIR Backend For RadeonSI

[phoronix]

Phoronix: 92 Patches Later: Experimental NIR Backend For RadeonSI

Nicolai Hähnle of AMD has posted his set of 92 patches for implementing an experimental NIR back-end within the RadeonSI Gallium3D driver...

http://www.phoronix.com/scan.php?page=news_item&px=NIR-For-RadeonSI-92

[jrch2k8]

mmm this could prove to be very interesting for bypassing lots of extra layers in the shader compiler and could allow to share SPIR shaders in the future, nice job

[Adarion]

R600_DEBUG=nir for radeonSI? Sure? Or do they use the same variable?

[Michael]

R600_DEBUG=nir for radeonSI? Sure? Or do they use the same variable?

Yes, just like R600_DEBUG=sisched

[Serafean]

R600_DEBUG=nir for radeonSI? Sure? Or do they use the same variable?

You can even set them both at the same time :
R600_DEBUG="nir,schisched"

A probably incomplete list of values : https://pastebin.com/PvGYRPBM

[FireBurn]

You can even set them both at the same time :
R600_DEBUG="nir,schisched"

A probably incomplete list of values : https://pastebin.com/PvGYRPBM

R600_DEBUG=help shows what's available, currently:

debug_get_flags_option: help for R600_DEBUG:
| tex [0x0000000000000001] Print texture info
| compute [0x0000000000000004] Print compute info
| vm [0x0000000000000008] Print virtual addresses when creating resources
| info [0x0000010000000000] Print driver information
| fs [0x0000000000000020] Print fetch shaders
| vs [0x0000000000000040] Print vertex shaders
| gs [0x0000000000000080] Print geometry shaders
| ps [0x0000000000000100] Print pixel shaders
| cs [0x0000000000000200] Print compute shaders
| tcs [0x0000000000000400] Print tessellation control shaders
| tes [0x0000000000000800] Print tessellation evaluation shaders
| noir [0x0000000000001000] Don't print the LLVM IR
| notgsi [0x0000000000002000] Don't print the TGSI
| noasm [0x0000000000004000] Don't print disassembled shaders
| preoptir [0x0000000000008000] Print the LLVM IR before initial optimizations
| checkir [0x0000000000010000] Enable additional sanity checks on shader IR
| nooptvariant [0x0000000000020000] Disable compiling optimized shader variants.
| testdma [0x0000000000100000] Invoke SDMA tests and exit.
| testvmfaultcp [0x0008000000000000] Invoke a CP VM fault test and exit.
| testvmfaultsdma [0x0010000000000000] Invoke a SDMA VM fault test and exit.
| testvmfaultshader [0x0020000000000000] Invoke a shader VM fault test and exit.
| nodma [0x0000000100000000] Disable asynchronous DMA
| nohyperz [0x0000000200000000] Disable Hyper-Z
| noinvalrange [0x0000000400000000] Disable handling of INVALIDATE_RANGE map flags
| no2d [0x0000000800000000] Disable 2D tiling
| notiling [0x0000001000000000] Disable tiling
| switch_on_eop [0x0000002000000000] Program WD/IA to switch on end-of-packet.
| forcedma [0x0000004000000000] Use asynchronous DMA for all operations when possible.
| precompile [0x0000008000000000] Compile one shader variant at shader creation.
| nowc [0x0000020000000000] Disable GTT write combining
| check_vm [0x0000040000000000] Check VM faults and dump debug info.
| nodcc [0x0000080000000000] Disable DCC.
| nodccclear [0x0000100000000000] Disable DCC fast clear.
| norbplus [0x0000200000000000] Disable RB+.
| sisched [0x0000400000000000] Enable LLVM SI Machine Instruction Scheduler.
| mono [0x0000800000000000] Use old-style monolithic shaders compiled on demand
| noce [0x0001000000000000] Disable the constant engine
| unsafemath [0x0002000000000000] Enable unsafe math shader optimizations
| nodccfb [0x0004000000000000] Disable separate DCC on the main framebuffer

[Beherit]

What's NIR?

[starshipeleven]

What's NIR?

http://phoronix.com/scan.php?page=search&q=NIR+

"NIR is the new intermediate representation used by Mesa. Currently the Mesa Intel, Freedreno, and VC4 drivers make use of this code."

An "intermediate representation" is a step in the shader compile chain, first stuff is compiled into this generic intermediate form, then from this it is compiled into GPU-specific shaders and then sent to the GPU. A shader is a bunch of instructions for the GPU coming from a program needing to use the GPU.

Note that this is my own understanding of this, it's not my field and I have only a limited understanding of what is going on.

This article talks about patches that allow radeonsi (3D acceleration on GPUs supported by AMDGPU open driver) to use this NIR. I assume that if everyone uses the same intermediate representation then the compiler generating it will be more robust and generate more efficient GPU code as everyone pools resources on the same thing.

[Beherit]

Thank you starshipeleven.