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NUVIA To Make Serious Play For New CPUs In The Datacenter, Hires Linux/OSS Veteran

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  • #11
    Originally posted by ms178 View Post
    ad 3) Cross-compiling is possible even today (as is done with ARM and x86), proper testing might be a different beast though. I've read of emulators which mimick the chip you are developing for in software. Prototyping with an FPGA might also be an option.
    Well, Tachyum promises a binary translator, with the claim that "EXISTING APPLICATIONS CAN RUN WITHOUT CHANGES".

    As for development environments, they offer:
    • Architectural transactional simulator
    • Cycle approximate simulator
    • Dynamic binary translator to x64
    • FPGA hardware emulator (purchased separately)

    More: https://www.tachyum.com/assets/img/Datasheet-Tools.pdf

    If a few more performance-robbing mitigations become needed from yet-to-surface Intel vulnerabilities, you could almost believe their claim of: "FASTER THAN XEON BUT SMALLER THAN ARM".

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    • #12
      Originally posted by coder View Post
      If a few more performance-robbing mitigations become needed from yet-to-surface Intel vulnerabilities, you could almost believe their claim of: "FASTER THAN XEON BUT SMALLER THAN ARM".
      THe main issue is that they will also be "NOT FASTER THAN EPYC"

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      • #13
        Originally posted by coder View Post
        According to Anandtech:
        microarchitecture is not instruction set, it is its implementation. it wouldn't be very smart to design completely new isa, because then you will have to provide support for it everywhere

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        • #14
          Originally posted by pkese View Post
          3) How will software be written for these architectures if all of our development laptops and desktops machines are running x86 (because x86 CPUs are powerful and compile fast)? And don't deceive yourself by thinking it is just a recompile... what do you do when you have a bug appearing on target machine that you can't reproduce on platform that you are developing on because someone decided that either floating point corner cases or atomic/synchronization operations behave slightly differently there ...
          lol, why don't you ask how people do linux development on macbooks
          compile it on its native server if crosscompile is too hard (servers are perfect for compilation)

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          • #15
            Originally posted by coder View Post
            According to Anandtech:



            However, that still sounds like speculation, rather than an official statement of any kind. But I'd have to ask why such talented, veteran CPU designers would've gotten together just to slap together a me-too SoC with off-the-shelf IP. It doesn't make sense to me, on a number of different levels.
            The SoC was speculated to be based on an ARM-core (in the article). Hence my run-off-the-mill SoC vendor.
            I highly doubt that they will create a new ecosystem and ISA + implementation from scratch. That will take years and years.

            As to the why, I guess why not? All the high-end SoC-vendors are just a major PITA to deal with.
            Samsung, Apple, Nvidia etc. Maybe this will become your friendly neighborhood SoC-vendor?

            My guess is that they are trying to be different on the software part. Open, coherent and Linux-friendly.
            Other than that, your guess is as good as mine.

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            • #16
              When I saw a new CPU company named NuVIA, my first thought it was someone who got x86 rights from Via in Taiwan.

              I am not sure what these guys can do that Qualcomm (Centriq), Cavium (ThunderX) and Ampere (X-Gene) and a host of others have tried previously.

              Power is going open now and you still have Epyc and Xeon Next coming. Cavium continues to hide under a rock and refuse to talk to the general compute crowd.

              Qualcomm walked away from Centriq when Broadcom tried to LBO them. Ampere has their Lenovo deal with eMag, results still TBD.

              Is there a datacenter demand that cannot be met today? And for what? There are already hosting services providing ARM capacity today on the cheap.

              With 2 standard 2U rack offerings, the only value add now is the planar and how much EDSFF flash you can stuff in it.

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              • #17
                Originally posted by pal666 View Post
                microarchitecture is not instruction set, it is its implementation.
                I didn't say it was. That was a response to milkylainen , who seemed to be implying that they were just taking readily available IP and slapping it together into a server SoC.

                Originally posted by pal666 View Post
                it wouldn't be very smart to design completely new isa, because then you will have to provide support for it everywhere
                Yes, agreed. It's a big lift. Tachyum is going that route and I fear for them.

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                • #18
                  Originally posted by edwaleni View Post
                  I am not sure what these guys can do that Qualcomm (Centriq), Cavium (ThunderX) and Ampere (X-Gene) and a host of others have tried previously.
                  Agreed. For various reasons, I doubt it's ARM-based.

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                  • #19
                    Originally posted by starshipeleven View Post
                    Yay! More ARM systems that will not have complete shit bootloaders and can boot ARM distros without having a custom image and kernel update script made for each of them.
                    Oh yes, let turn ARMs to what x86 is. With proprietary, backdoored wintel-designed UEFI, ACPI bugged like hell nobody going to fix ever, etc. Also boost frequency, add more cored... so it could be on par with e.g. Xeon in terms of TDP. And at the end of day difference would be... what exactly? Just different pocket to put your money? But the result is same?

                    This said it seems it probably going to be focused on server things and ppl managing large deployments aren't exactly happy about that state of things, you can see how many alternate boot solutions pop here and there, not to mention they can afford to build custom images anyway: that's how they deploy OSes in first place. Installing OS using installer on each and every server (or VM) is so lame and time consuming...

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                    • #20
                      Originally posted by milkylainen View Post
                      I highly doubt that they will create a new ecosystem and ISA + implementation from scratch. That will take years and years.
                      They do not have to. Say there is RISC-V already if ARM doesn't gives enough freedom, and they got quite some names likely capable of extending and improving things, developing e.g. compute accelerators and so on. Why not?

                      As concrete example: Nvidia is blob-only something, does not runs on anything that isn't x86 (yes, China wanted something to pair with their MIPS designs for example - and Nvidia had nothing to offer at this point; these can't use x86 either I guess). AMD throws weird tantrums, changing ideas what their "main" compute runtime/interfaces should be like every couple of months, failing to properly implement any of that at all. I thnik there is some headroom in high-performance computing area for smart guys who can get it right: do unobtrusive acceleration well-supported by opensource tooling, for example. More or less stable (and ideally without dropping support of HW at speeds AMD/Nvidia do - enterprises wouldn't buy new CPUs, GPUs and so on every couple of years unlike stupid gamers). Ahh, if someone of these startup ppl read all that: take it as free hint. I'm long to see AMD, Intel and nvidia butts kicked, they deserve it hell a lot. I'm pretty sure x86 ecosystem grown into toxic and stale something, there should be something better than that.
                      Last edited by SystemCrasher; 16 November 2019, 07:12 PM.

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