OpenBSD Disabling SMT / Hyper Threading Due To Security Concerns

[peapa]

SMT was just a hack to cover the fact that branch prediction misses in the long-pipeline "NetBurst" ( fire whoever came up with that name ) architecture were punishing performance. The proper solution would be to abandon the NetBurst architecture, which they did ( returned to the PIII architecture, but called it 'Core' ), but then brought bits of NetBurst back for some reason? Probably so they could flog dual-core systems as quad-core. Personally I disable SMT because it's horrible for realtime scheduling.

Most of this is wrong :
- SMT existed long before NetBurst
- Core was derived from the P6 architecture, which continued evolving after the Pentium 3 and was used in some Pentium M processors
- SMT has benefits besides filling the pipeline : it allows better usage of the compute units of a core. Nowadays' x86 cores are generally too wide for ILP alone to allow filling them.

[Weasel]

HT is an abomination. I ended up disabling it on my work PC some time ago because of all the array calculations in Excel that were failing for no apparent reason…

Sounds like you have bad RAM mate.

[bridgman]

SMT has benefits besides filling the pipeline : it allows better usage of the compute units of a core. Nowadays' x86 cores are generally too wide for ILP alone to allow filling them.

Right... the problem with modern CPU design is that you have to make them stupid-wide to run competitively on code with extremely high ILP (ie code where it was worth spending a lot of money tweaking it for more performance) but then you get a lot of other workloads with much lower ILP and a lot of your execution units sit idle.

In the high-ILP case SMT is not likely to help much - and might even hurt - but in the low-ILP case SMT can make a big difference in performance as long as the code is able to take advantage of more threads.

Intel also used SMT in what I thought was a clever way on some of the earlier Atom parts - allowing a relatively simple CPU design to run more efficiently by having a second instruction stream that could often execute when the first one was stalled waiting for memory.

On a more complex CPU with wider instruction window and more prefetching those stalls would have been much less likely to happen.

[xiando]

I can't take this anymore!

delid this!!!!!!

hi /g/

[chithanh]

This action by OpenBSD may or may not be due to this:

TLBleed: When Protecting Your CPU Caches is Not Enough

https://www.blackhat.com/us-18/briefings/schedule/index.html#tlbleed-when-protecting-your-cpu-caches-is-not-enough-10149

[gamerk2]

HT is an abomination. I ended up disabling it on my work PC some time ago because of all the array calculations in Excel that were failing for no apparent reason…

Yeah, that's not a HTT problem; sounds more like RAM to me.