Dirk Hohndel Is No Longer Intel's Chief Linux/OSS Technologist

[starshipeleven]

You don't even understand how it works.... Consider x86 and all of it's extensions, and then consider that on most cycles either 2 or 3 instructions are retired per pipeline. AMD designed their CMT architecture with only 2 integer units per pipeline. That's what you're talking about. The problem was never CMT, it was always that AMD never released it at scale. IMO,

Scale in what sense? adding more cores isn't a solution if the programs don't multithread enough.

And I'm talking about the fact that the unit doing most of the job in consumer workloads is shared by two cores, so if loaded by programs that don't multithread you get the same issues of hyperthreading, most threads go in the first two "cores" that in fact share a single unit, so it's like running on ONE core.
Don't remember the name for that.

[duby229]

Scale in what sense? adding more cores isn't a solution if the programs don't multithread enough.

And I'm talking about the fact that the unit doing most of the job in consumer workloads is shared by two cores, so if loaded by programs that don't multithread you get the same issues of hyperthreading, most threads go in the first two "cores" that in fact share a single unit, so it's like running on ONE core.
Don't remember the name for that.

jeez.....

[chrisb]

Really? You said you buy Intel products for their GPU driver? How horrible. Literally everything displayed on screen tears, 2d images, 3d games, video, fonts, icons, everything possible. And lets not forget mis-loaded textures or lighting glitches... Glitchiest graphics driver ever....

Works fine for me though I do use option "TearFree". Are you using latest kernel and drivers? Did you file bug reports?

[Passso]

even children know multiple cores are better than raw power. what is the most powerful singlecore cpu lol? how many cores are on really powerful chips(gpus) ?

Children know it, but testers prove they are wrong.

[starshipeleven]

jeez.....

... us!

[duby229]

... us!

You are wrong. And you don't even know enough about it to know why or how you're wrong.

[starshipeleven]

You are wrong. And you don't even know enough about it to know why or how you're wrong.

The fact you can't even correct me makes what I said right, and what you said wrong.

[duby229]

The fact you can't even correct me makes what I said right, and what you said wrong.

I did correct you.

You don't even understand how it works.... Consider x86 and all of it's extensions, and then consider that on most cycles either 2 or 3 instructions are retired per pipeline. AMD designed their CMT architecture with only 2 integer units per pipeline. That's what you're talking about. The problem was never CMT, it was always that AMD never released it at scale. IMO,

Read it again and this time try to understand.

[starshipeleven]

Read it again and this time try to understand.

As I asked also above, can you please explain better what you mean for "release it at scale"?

More cores? More units? More sockets? More tacos?

What is this "at scale" you are talking about?

[duby229]

As I asked also above, can you please explain better what you mean for "release it at scale"?

More cores? More units? More sockets? More tacos?

What is this "at scale" you are talking about?

AMD's marketing department really screwed up when they called BD 8 cores. In reality it's not, it's 4 cores. Each core AMD called a module, but really it's a core, that's where the frontend is, the decode, prefetch,. scheduler. Each module (the actual core) has 2 integer pipelines and they have 2 integer units per pipeline. It should have 3 full function integer units per pipeline, but AMD designed it with only 2.

EDIT: Actually I've read a number of articles recently about AVX, and it seems like there are loads where it's possible to retire 4 instructions per cycle, so really AMD could scale it to 4 integer units per pipeline and it wouldn't be too big a waste.