Originally posted by AndyChow
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Work-In-Progress Porting Of GCN 1.0/1.1 UVD To AMDGPU DRM Driver
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I'm confused. I've been using the AMDGPU kernel driver with my R7 260X (CIK) for a while now (a year?) and hardware-accelerated video playback has appeared to be working since I switched. The kernel log mentions UVD a few times and vdpauinfo shows all the correct information. Video playback with mplayer/mpv shows vdpau is being used. What am I missing?
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Originally posted by Imroy View PostI'm confused. I've been using the AMDGPU kernel driver with my R7 260X (CIK) for a while now (a year?) and hardware-accelerated video playback has appeared to be working since I switched. The kernel log mentions UVD a few times and vdpauinfo shows all the correct information. Video playback with mplayer/mpv shows vdpau is being used. What am I missing?
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Originally posted by starshipeleven View PostAs said above, this can be automated easily. We have packages that do far more complex shit during installation.
(What I didn't realize is that adding the header would prevent it from working with radeon.)
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Originally posted by AndyChow View PostI don't even get the point of things like UVD. It never works and you're better off setting to software decode. IMO they should remove it and save themselves the mm². Or replace it with a quicksync equivalent. And not VCE, VCE isn't even faster than CPU encoding, and terrible quality.
Maybe I'm missing something.
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Originally posted by DanL View Post
Works for me...
The point is that it's more efficient to decode with dedicated hardware.
If they removed that asic, that space could be used for more compute units, or decreased size of silicon.
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Originally posted by AndyChow View Post
It might work, but what's the point? Does it actually reduce power consumption irl or anything? If it decreases your CPU usage from 20% to 10%, but increases your GPU frequency from 300 Mhz to 1250 Mhz, what's the point? It might actually increase overall power consumption.
If they removed that asic, that space could be used for more compute units, or decreased size of silicon.
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