R6xx/R7XX kernel 2.6.33 module performance hacks

[airlied]

My results are non kms. So I guess with xmings tests its a win either way

non-kms is overusing those functions, we hit the ring for every single drawing operation under X, would be better trying to fix the DDX to batch like we do for KMS. I just don't care enough for non-kms to do it. You'll probably get a 30% or so increase and then these hacks will be a lot less useful.

Dave.

[agd5f]

It won't make a difference for KMS as Obscene_CNN's patches only affect the non-KMS paths.

[Obscene_CNN]

Is this under KMS? or non-KMS? the non-KMS x11perf path is really kernel heavy since we flush after every operation, under KMS with latest -ati its a lot different profile, since it batches operations.

Dave.

My results are non kms. So I guess with xmings tests its a win either way

[xming]

Is this under KMS? or non-KMS? the non-KMS x11perf path is really kernel heavy since we flush after every operation, under KMS with latest -ati its a lot different profile, since it batches operations.

Dave.

Mine results are both under KMS.

[airlied]

here are some kernel 2.6.33 module performance patches for r6xx/7xx chipsets that I wrote.

http://pastebin.ca/1743103

http://pastebin.ca/1743100

It made Torcs playable on my laptop.

The benchmark x11perf -aa10text shows more than 5% improvement on my lap top

Please give me a before and after benchmark with the command x11perf -aa10text if you could.

Is this under KMS? or non-KMS? the non-KMS x11perf path is really kernel heavy since we flush after every operation, under KMS with latest -ati its a lot different profile, since it batches operations.

Dave.

[xming]

I didn't check with that one. I will try it.

I did have someone test it with ut2004 with great results

That someone would be me

x11perf gives me some improvemenet

before

4800000 reps @   0.0012 msec (855000.0/sec): Char in 80-char aa line (Charter 10)
4800000 reps @   0.0012 msec (848000.0/sec): Char in 80-char aa line (Charter 10)

after

4800000 reps @   0.0011 msec (883000.0/sec): Char in 80-char aa line (Charter 10)
4800000 reps @   0.0012 msec (866000.0/sec): Char in 80-char aa line (Charter 10)
4800000 reps @   0.0011 msec (942000.0/sec): Char in 80-char aa line (Charter 10)
4800000 reps @   0.0011 msec (906000.0/sec): Char in 80-char aa line (Charter 10)
4800000 reps @   0.0012 msec (844000.0/sec): Char in 80-char aa line (Charter 10)

glxgears is the same fps, but a lot smoother, w/o these 21 patches the gears would pause for a split ms.

The most noticeable difference (for me) is in ut2004, where unplayble maps (13~17, it's now like 19~22) are unbearable And where playable maps have better fps and most important (like glxgears) not more pauses/shutter. I guess these patches improved the minimum frame rate and eliminated pauses.

My system is an amd x2 3800 with 3850 AGP (8x) with resolution of 1600x1050.

BTW, patches applied cleanly on 2.6.32 radeon-testing and played ut2004 about an hour, haven't had crashes nor redering bugs (AFAICS). And suspended to RAM and resumed correctly this morning.

[Obscene_CNN]

I'm not conviced it's the and; ignore it for a moment: with consecutive OUT_RINGs the CPU still needs to compute the next index into the ring before actually writing into it, so it's possible that a mov into the ring is stalled by the inc of the index.

In a 2 issue superscalar cpu a mov followed by an index inc can be executed in one cycle. Another move followed by another index inc can be executed on the very next cycle. In this case no stall occurs however the inc takes up one of the available execution pipes. The result is one move per cpu cycle.

With open-coded offsets instead the index is known at compile time and the compiler emits the movs back to back.

In this case both pipes are filled with move instructions each cpu cycle. The result is 2 moves per cpu cycle.

[tettamanti]

Well no matter how GCC tries to hide the mask op its still at least 4 times slower than my optimized code.

I'm not conviced it's the and; ignore it for a moment: with consecutive OUT_RINGs the CPU still needs to compute the next index into the ring before actually writing into it, so it's possible that a mov into the ring is stalled by the inc of the index.
With open-coded offsets instead the index is known at compile time and the compiler emits the movs back to back.

[Obscene_CNN]

tenttamanti,

Well no matter how GCC tries to hide the mask op its still at least 4 times slower than my optimized code.

Yes its ugly and hard to maintain but it can't be done faster in C. I'm almost willing to bet beer that this will not make it into the kernel (I would bet beer but I know that they will patch it into the kernel to win the bet then patch it out) but that's why I call it a hack.


NOTE: I have discovered that the x11perf test is not a very good test case as it can fluctuate 5% . My patches do however give a noticeable improvement to 3d games that bog down a system.

[tettamanti]

Ops, I totally missed the "return" inside the if block; ok, you don't touch the ring twice if the shortcut is taken.
Anywayr what I see here is that GCC schedules the write to the ring (using a temp register for the index) between the increment and the masking, trying to fill the pipeline.
One difference is that in your fast-path the index becomes an immediate; I tent to be wary of such optimizations (open-coding) though: it's far too easy to introduce bugs when the open-coded parts are not kept in sync.
One thing that could be tried is moving the test for the wrap in BEGIN_RING, and set the mask to ~0 if it's not needed; gcc seems to be smart enough to skip the and in this case.
Side effect is that if you pass the wrong number of words to BEGIN then you end up writing past the ring...