ATI Linux Drivers Gain Support For Unreleased RS880

[Louise]

Apparently GPU's don't have L3 cache...

[Louise]

Just found this about Fusion:

http://www.xbitlabs.com/news/cpu/display/20081115141516_AMD_Delays_Introduction_of__Fusion__CPU_GPU_Products.html

The first accelerated processing units (APUs) - the term AMD uses to describe its CPU-GPU chips - will be code-named Llano and Ontario. The former - Lllano - will feature four cores, 4MB of cache, graphics processing engine and DDR3 memory controller; the latter - Ontario - will sport two cores, 1MB of cache and DDR3 memory controller. The Llano will be targeted at mainstream desktop market segment, whereas the latter will be aimed at ultra-portable notebooks.

How on earth can 4MB cache be split or shared between 4 CPU cores and 1 GPU ?

Or is "graphics processing engine" != GPU ?

Fusion is more interesting than I first thought

[some-guy]

RAM could become integrated just like sound cards, and ethernet/usb/firewire/etc ports

[Louise]

I'm not sure that makes sense, just in terms of die size vs. yield. It would basically turn a small chip into a huge chip. A multi-chip package might work (cf. TI'S OMAP3 family and the Xbox 360 GPU), but I don't know how much RAM can be feasibly crammed into one package. This could have some interesting implications for netbooks...

Okay, that's a pretty good point.

[Ex-Cyber]

I predict that at some point X GB of RAM is "enough for anyone", and RAM will be on die too for Fusion products.

I'm not sure that makes sense, just in terms of die size vs. yield. It would basically turn a small chip into a huge chip. A multi-chip package might work (cf. TI'S OMAP3 family and the Xbox 360 GPU), but I don't know how much RAM can be feasibly crammed into one package. This could have some interesting implications for netbooks...

[Louise]

That's what gets interesting about Fusion parts -- nearly all of the pins on a GPU are either power/ground or for communicating with CPU and memory. Since the CPU and memory connections are now on chip, other than extra power/ground for the GPU and pins for the video outputs you don't really need a lot more pins when you add a GPU.

That's really interesting. Also in the sense of manufacturing cost. Pins should be quite expensive to wire in a CPU, which is why 64bit AMD CPU's only support 2^42bit memory and not 2^64bit -- for the time being

I bet Fusion chips will become quite cheap.

I predict that at some point X GB of RAM is "enough for anyone", and RAM will be on die too for Fusion products.

[bridgman]

... Of course that would require some sort of weird memory controller...

It is all interesting

Actually I don't quite get how the numbers of pins won't be a serious problem for Fusion. A CPU have ~1000 pins, and a GPU have maybe also ~1000.

I read that CPU's would *never* get more can 16 cores, because the numbers of pins required to the ram banks would not be possible to fit on a die.

That's what gets interesting about Fusion parts -- nearly all of the pins on a GPU are either power/ground or for communicating with CPU and memory. Since the CPU and memory connections are now on chip, other than extra power/ground for the GPU and pins for the video outputs you don't really need a lot more pins when you add a GPU.

[Kano]

Fine, but please release a version and not only a git snapshot.

[DanL]

Adding new ids is something really impressive...

Despite your sarcasm... what's significant here is that the ID is making its way into the driver way before the product releases. So hopefully, the major distros will have support before end-users get their hands on it. This hasn't always happened in the past.

[Louise]

I *definitely* can't tell you that. Sorry

... Of course that would require some sort of weird memory controller...

It is all interesting

Actually I don't quite get how the numbers of pins won't be a serious problem for Fusion. A CPU have ~1000 pins, and a GPU have maybe also ~1000.

I read that CPU's would *never* get more can 16 cores, because the numbers of pins required to the ram banks would not be possible to fit on a die.