AMD Queues Its First Batch Of AMDGPU Changes For Linux 5.9: Sienna Cichlid + More

[phoronix]

Phoronix: AMD Queues Its First Batch Of AMDGPU Changes For Linux 5.9: Sienna Cichlid + More

On Friday the initial batch of AMDGPU kernel graphics driver changes were submitted to DRM-Next ahead of the Linux 5.9 merge window happening in August...

http://www.phoronix.com/scan.php?pag...ux-5.9-Round-1

[_r00t-]

Will those changes fix ring gfx timeout bug for navi10 too?

[atomsymbol]

The only data I have found in the patches is that the new GPU has 4 SDMA engines, up from 2 in Polaris/Navi.

[xxmitsu]

The only data I have found in the patches is that the new GPU has 4 SDMA engines, up from 2 in Polaris/Navi.

Oh, that thing that they plan to disable completely ?
https://gitlab.freedesktop.org/mesa/..._requests/4895

[winterstars]

The only data I have found in the patches is that the new GPU has 4 SDMA engines, up from 2 in Polaris/Navi.

Is that all

[atomsymbol]

Is that all

I am ready to accept a defeat if you post additional _reliable_ hardware configuration data about the next GPU. The IPC (instructions per clock) compared to Navi1 would be a quite useful datapoint ...

[TemplarGR]

Fingers crossed for Freesync over HDMI

[tiltkoko]

There is no new pitcairn etc. uvd firmware posted in the linux-firmware.git tree...
That has always been a missing piece.

[xxmitsu]

There is no new pitcairn etc. uvd firmware posted in the linux-firmware.git tree...
That has always been a missing piece.

I think they plan to use the old firmware with amdgpu.

[winterstars]

I am ready to accept a defeat if you post additional _reliable_ hardware configuration data about the next GPU. The IPC (instructions per clock) compared to Navi1 would be a quite useful datapoint ...

Not exhaustive but I have discovered a few

• New PCI device supporting HDMI over USB-C
• XGMI block to connect to a max of 4 GPUs
• Additional SDMA engine supporting DMA over XGMI/IF
• MEC queues per pipe is reduced by half probably indicating that the shader array size will not be increased wrt N10.
• ME pipes doubled which could probably indicate each pipe feeding 2 SE
• Reduced wavefronts per SIMD suggesting improved ILP and/or reduced latencies.
• Primitive binning support removed.
• 2x VCN 3.0 instances. One for decode one for encode (as of yet)
• Almost doubled the sensors used for DVFS
• Support for newer VRMs(Infineon) in the I2C configuration
• Retired a bunch of scalar operations within the workgroup (from LLVM)
• Feature parity with Navi12 for mixed/low precision ops (from LLVM)
• Removed a bunch of bugs and hazards like the LDS Misaligned bug et al
• New instruction encoding

I might have missed a lot more, but these came off the top of my head when I went through the commits some time ago.

PS. There is no defeat. Everybody wins with open source.