Originally posted by discordian
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AMDGPU Gets Some Promising Fixes For Linux 5.4: Clang, Undervolting, Golden Settings
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It's a list of "program value X into register Y" register settings provided by the HW block teams whenever the recommended setting does not match the power-on default value for a register.
Golden settings for most blocks are picked up by VBIOS, but GFX and SDMA golden settings are picked up by the kernel driver because VBIOS does not touch those blocks.Test signature
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So I'm guessing uvd states are still kind of off-limits regarding overclocking/underclocking/undervolting. A while back did a bios flash overclock (GPU:600->680MHz, Mem:400->480MHz) of the uvd state on an old passive ATI/AMD HD 4650 AGP card and got about 10fps boost doing a benchmark with mpv with hardware decoding on. This made it possible to enable some of the higher quality features of mpv.
Next up would be a HD 7770, which would likely at least benefit from an undervolt on the higher uvd state and memory underclock on a two display setup on the second idle state. Unfortunately there still isn't hardware acceleration for video on GCN 1.0 with AMDGPU so testing uvd state undervolting anyway would still require bios flashing. Vulkan video decoding is coming next year, so fingers crossed.
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Originally posted by bridgman View PostIt's a list of "program value X into register Y" register settings provided by the HW block teams whenever the recommended setting does not match the power-on default value for a register.
Golden settings for most blocks are picked up by VBIOS, but GFX and SDMA golden settings are picked up by the kernel driver because VBIOS does not touch those blocks.
See: https://bugs.freedesktop.org/show_bug.cgi?id=111482
Currently, my Sapphire Pulse RX 5700 XT has that annoying bug, that after resume, it uses lower power / mclk, which causes flickering.
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Originally posted by jrdoane View PostIt's really fucky. Whenever I touch voltages, they all just seem to jump to 1.20v. If I undo the voltage change, it goes back to normal. It's insane. I've had this issue ever since I could start fiddling with /sys/class/drm/card0/device/pp_od_clk_voltage.
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Originally posted by Strunkenbold View Post
I was having the same problem. But I upgraded to Vega just this year and somehow I couldn't imagine that no one had this problem before in all years this architecture already exists. So I didn't report it. But I was measuring with a power meter and saw that things went in the bad direction... In the end, I gave up on this. Great that someone popped up and wrote a patch. It's just a little late AMD.
Edit: It looks like there is an RC6 build already. I might actually test this out right now.
Edit 2: No dice. It still forces 1.20v on all p-states with any voltage change.Last edited by jrdoane; 04 November 2019, 07:59 PM.
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If I'm willing to sacrifice some performance for lower temps and fan speeds, should I even muck about with undervolting, or just go straight for clock speed (assuming that's even controllable)?
Also, where is all of this documented?
FWIW, I have a Radeon VII. Thanks.
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Originally posted by coder View PostAlso, where is all of this documented?
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