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pp_od_clk_voltage testing on vegafe

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  • pp_od_clk_voltage testing on vegafe

    After trying the latest rc kernel and finding that setting clocks/voltages now works i've done a little testing.

    OpenBenchmarking.org, Phoronix Test Suite, Linux benchmarking, automated benchmarking, benchmarking results, benchmarking repository, open source benchmarking, benchmarking test profiles


    I put some conductonaut on the vid card (air cooled).
    and the HBM holds 1000 with 0.9v
    The gpu runs 1400 at 0.9v but needs 1.0v for 1500

    50Mhz more on hbm helps more than 100Mhz on the gpu in those two tests.

    anyone wanna test ? any ideas for clocks I should try, or benchmarks to add ?

  • #2
    /sys/class/hwmon/hwmon1/power1_cap can only go upto 220W
    This seems to be limiting the performance in some way

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    • #3
      OpenBenchmarking.org, Phoronix Test Suite, Linux benchmarking, automated benchmarking, benchmarking results, benchmarking repository, open source benchmarking, benchmarking test profiles

      some more clocks tried. You can see that the higher clocks, and the voltages needed for them, produce lower benchmark results.

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      • #4
        One quirk I forgot to mention: state 6 and 7 for the sclk must be set the same, otherwise it'll default to 1.20v and ignore the setting

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        • #5
          I redid all my testing from 1000 to 1600 in 25MHz increments, i'll post a better graph when I get time.
          testing above 1600 seems to be impossible, it just won't let it hit anything over that number for some reason.
          Also you can't adjust the power1_cap* files
          amdtweak does modify them, but I'll need to test to see if it actually works.

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          • #6


            min voltage tested for stability to the lowest 0.005 at 1000, 1200, and 1300 to 1600 in 25MHz increments
            852MHz is the stock lowest with 0.800v I didn't mess with that.
            Stability testing included 1x run of unigine super and 3x runs of unigine tropics at 4K with max settings.
            I crashed/locked up the system over 30x to create this over the weekend.
            25MHz testing of 1000-1300 could be done for granularity, but you get the idea.
            The voltage increments needed for each 25MHz above 1300 increased, and gets a little steeper above 1425

            This is with the stock vegafe aircooler, stock bios at 220w, and thermal grizzly conductonaut applied. Custom aggressive fan control program (max at 60c).
            Last edited by Soul_keeper; 14 August 2018, 07:25 PM.

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            • #7
              Ok, changing the power1_cap does seem to have an effect, amdtweak seems to work although it prints clocks wrong.
              OpenBenchmarking.org, Phoronix Test Suite, Linux benchmarking, automated benchmarking, benchmarking results, benchmarking repository, open source benchmarking, benchmarking test profiles


              Raising the power limit has a minor effect, which seems to be noticed by other review sites. Lowering it has a dramatic effect.

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              • #8
                Thanks for reporting on your experiments, Soul_keeper.

                When I tried to optimize the power consumption of my vega64, as reported in the thread linked below, I could not manage to beat the default voltage values, and instead just limited the maximum frequency to 1400 MHz (which has a dramatic effect on power consumption). Have you tried looking at the power consumption at the wall for the various points in your curve? It'd be interesting to know the best voltage/frequency in terms of performance to wattage ratio.
                From preliminary testing, by setting power_dpm_force_performance_level to manual first, and then setting pp_power_profile_mode to the various profiles (0 to

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                • #9
                  I havn't looked much into that, it's time consuming. I do have a watt measurer hooked up. Just takes a lot of time watching it.
                  Also, the card still seems to overheat and lockup at 1600MHz undervolted with fan at max.

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                  • #10
                    Any change to pp_od_clk_voltage seems to increase idle power usage by 13W
                    852MHz 0.800v is supposed to be the lowest state, but sensors are reporting 0.75v at idle. If I change anything, other than the lowest state, then idle becomes 0.82v.
                    0.8 is the lowest accepted value that can be applied to pp_od_clk_voltage so I don't get it.
                    Has anyone else noticed this ?
                    Why is this happening ?

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