Intel To Disable TSX By Default On More CPUs With New Microcode

[coder]

With Intel disabling features and slowing down their CPUs, I wonder if someone asks for some of their money back? After all customers payed the full price only for a fully-functional, secure and performant CPU, or so they thought - not a buggy mess which gets slower over time due to fixing all kinds of issues.

When the first side-channel attacks got published and people started to see what the mitigations were going to cost, I heard rumors of hyperscalers suing Intel. I'm not sure if anything ever came of that, or if they just turned it into leverage for price breaks on more CPUs.

If you're dependent on a single supplier (and AMD didn't have the manufacturing volume to pick up all that business), you probably don't want to rock the boat by suing them. That could mean no more access to pre-release hardware, bespoke models, or sweetheart deals on huge orders.

These days, it feels like everybody is accustomed to news of yet another exploit and corresponding performance-robbing mitigations. It's surely at least one small reason for the mass-adoption of ARM.

[coder]

Intel allowed the feature to be used for competitive advantage over years, knowing that it was insecure, but now that they no longer sell that hardware, it will be disabled in the name of 'security'.

I cannot read any of this as Intel caring about security. Instead I see them pushing an insecure performance enhancement to boost sales, then crippling the chips after a while to boost sales of newer hardware. It sounds cynical as hell, but...

Well said.

I think this is the real scandal! It should've been disabled in 2018, when they discovered the issue and found no good mitigation worth using.

[coder]

You'll never see open chips from either of those. RISC-V might be an open ISA in the sense you won't get sued for implementing it

uid313 didn't demand open chips -- just a newer ISA.

Go OpenPOWER. Raptor Computing Systems have a trustworthy computer you can actually buy, today.

So, you're telling us that IBM published the full source for those CPUs they're using? Where can I download it?

P.S. I have nothing against Raptor Computing and wish them well.

[Developer12]

So, you're telling us that IBM published the full source for those CPUs they're using? Where can I download it?

P.S. I have nothing against Raptor Computing and wish them well.

The great achievement of OpenPOWER is that the source code for all the management cores are available. Every modern CPU and chipset contains scores of additional management cores for everything from PHY calibration to power/thermal management. Raptor makes the firmware for all of these freely available for inspection and modification. No other chip vendor (intel, AMD, or otherwise) likes to talk about the fact these exist. (AMD barely admits to the existence of the SMU in virtually every CPU they've ever made https://fuse.wikichip.org/news/1177/...che-and-smu/2/)

As for full source, you want Raptor's Libre BMC. It's a completely open BMC implemented on an FPGA which in it's current experimental form is capable for bootstrapping their machines in place of the aspeed BMCs they currently use. It's now been picked up by OpenPOWER itself and looks to soon be an official commercial offering.

For application processors, there's also the Libre SoC CPU/GPU project, though their chips are mobile focused. (4K graphics, but with very low power consumption)

[hotaru]

You'll never see open chips from either of those. RISC-V might be an open ISA in the sense you won't get sued for implementing it, but the chips made by eg Western Digital are unlikely to be open-source.

Go OpenPOWER. Raptor Computing Systems have a trustworthy computer you can actually buy, today.

none of the POWER chips that you can actually buy are open either. the ISA is, but the chips aren't.

[geearf]

rpcs3 is the only app i use that use and benefit from TSX greatly

How much of a difference does it make these days?

[coder]

The great achievement of OpenPOWER is that the source code for all the management cores are available. Every modern CPU and chipset contains scores of additional management cores for everything from PHY calibration to power/thermal management. Raptor makes the firmware for all of these freely available for inspection and modification. No other chip vendor (intel, AMD, or otherwise) likes to talk about the fact these exist. (AMD barely admits to the existence of the SMU in virtually every CPU they've ever made https://fuse.wikichip.org/news/1177/...che-and-smu/2/)

As for full source, you want Raptor's Libre BMC. It's a completely open BMC implemented on an FPGA which in it's current experimental form is capable for bootstrapping their machines in place of the aspeed BMCs they currently use. It's now been picked up by OpenPOWER itself and looks to soon be an official commercial offering.

You made the issue about open chips, when it wasn't. Then, you turned around and recommended Raptor Computing Systems, which AFAIK are built around similarly non-open chips (or, at least no more open than RISC-V, which you disparaged). You'll forgive me if I'm confused.

[coder]

I wouldn't be surprised if there's really very few programs that take advantage of Intel's version of transactional extensions.

Wow, might slow down all the applications using TSX..

In other words: No applications.

libpthread uses it to optimize stuff like pthread_mutex_lock(). So, that covers basically all multithreaded software, to some degree.

https://lwn.net/Articles/534758/

It's a bit like crypto acceleration, where you can gain benefits simply by using a library which uses it.

Of course, there's software which doesn't rely on mutexes, to enforce atomicity, and they would need to use it explicitly. However, those are relatively few, and a lot of them that stood to gain the most probably took the time to do it.

As others have mentioned, Intel never delivered a stable, practical version.

AFAICT, the only chips where it didn't work as advertised (apart from sidechannel attack vulnerabilities) were Haswells.

Developers don't like to have to cherry pick through 50 different SKUs to find the few that work...

You don't have to. CPUID tells you. In the chips where it was defective, they released microcode updates that removed it from the CPUID flags.

[hotaru]

You don't have to. CPUID tells you. In the chips where it was defective, they released microcode updates that removed it from the CPUID flags.

CPUID doesn't tell you until after you've bought the CPU and doesn't tell you whether it'll keep working with future microcode updates. to test TSX code, you need a CPU that supports it. Intel doesn't make buying one easy (you have to figure out which SKUs are the steppings that still support TSX), and even if you buy one of the right ones, it could lose the feature at any time.

[coder]

CPUID doesn't tell you until after you've bought the CPU and doesn't tell you whether it'll keep working with future microcode updates.

In general, it's not hard to find out which models have which features, but the spotty availability of TSX seems to have come along somewhat recently. For a long time, I think any Broadwell or newer CPU would have it.