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Intel To Disable TSX By Default On More CPUs With New Microcode

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  • Intel To Disable TSX By Default On More CPUs With New Microcode

    Phoronix: Intel To Disable TSX By Default On More CPUs With New Microcode

    Intel is going to be disabling Transactional Synchronization Extensions (TSX) by default for various Skylake through Coffee Lake processors with forthcoming microcode updates. Yes, this does mean performance implications for workloads benefiting from TSX. This change has seemingly not been talked about much at all publicly and I just happened to become aware of it when looking through new kernel patches...

    https://www.phoronix.com/scan.php?pa...-New-Microcode

  • #2
    Selling CPUs by having fancy hardware features is all fine but those features should actually work in a secure fashion too

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    • #3
      no TSX
      no Hyper Threading.
      lel

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      • #4
        With Intel disabling features and slowing down their CPUs, I wonder if someone asks for some of their money back? After all customers payed the full price only for a fully-functional, secure and performant CPU, or so they thought - not a buggy mess which gets slower over time due to fixing all kinds of issues.

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        • #5
          I think Intel TSX was first introduced with Ivy Bridge and at the time I was impressed that they managed to implement a fairly complex feature like that in a CPU, but I guess it was too soon to be impressed. The last 10 years have seen TSX disabled on pretty much every CPU generation due to the implementations being broken or buggy in many different ways. I thought it was pretty funny and also shows engineers at big companies are only human after all.

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          • #6
            All these performance neutering patches, made in the name of 'security' that in certain situations has no value whatsoever, should only be accepted if also conditioned by the "mitigations=" Kernel boot option.

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            • #7
              mitigations=off always this days...

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              • #8
                Originally posted by sheepdestroyer View Post
                All these performance neutering patches, made in the name of 'security' that in certain situations has no value whatsoever, should only be accepted if also conditioned by the "mitigations=" Kernel boot option.
                Absolutely +1

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                • #9
                  Originally posted by david-nk View Post
                  I think Intel TSX was first introduced with Ivy Bridge and at the time I was impressed that they managed to implement a fairly complex feature like that in a CPU, but I guess it was too soon to be impressed. The last 10 years have seen TSX disabled on pretty much every CPU generation due to the implementations being broken or buggy in many different ways. I thought it was pretty funny and also shows engineers at big companies are only human after all.
                  Its a damn shame too. I feel like there were so many applications in kernels and databases.

                  IBM has had a similar feature (Transactional-execution Facility) since z12 released in 2012. AFAIK its worked since day 1.

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                  • #10
                    Intel allowed the feature to be used for competitive advantage over years, knowing that it was insecure, but now that they no longer sell that hardware, it will be disabled in the name of 'security'.

                    I cannot read any of this as Intel caring about security. Instead I see them pushing an insecure performance enhancement to boost sales, then crippling the chips after a while to boost sales of newer hardware. It sounds cynical as hell, but...

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