User interrupts? Does that mean we get interrupts in user space like in micro controllers? Or do I misunderstand that completely?
Intel Discloses New CPU Instructions, Enhanced Hardware Feedback Interface (EHFI)
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Originally posted by Lycanthropist View PostUser interrupts? Does that mean we get interrupts in user space like in micro controllers? Or do I misunderstand that completely?
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Oh, and by the way--if Intel has not seen fit to implement an interrupt system--starting with the 8080, and even before that--as sophisticated as that found in the Z80 and MC6800, you certainly don't think they're going to do it now, do you? The sheer burden of dealing with the complexities of having to save the environment---and of restoring it---of a "modern" x86 (everything is relative; some might say that "modern x86" is an oxymoron) makes that idea laughable, at the very least.Last edited by danmcgrew; 04 October 2020, 09:13 PM.
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Originally posted by danmcgrew View PostYou don't 'misunderstand' anything. Even the x86 experts here don't understand enough in order to answer as simple a question as that posed / posted in @#7.
https://www.intel.com/content/dam/ww...ual-325383.pdf
If you prefer the AMD version, feel free to download it here:
Free free to count the instructions yourself (as if the number of instructions means anything in this day and age...).
BTW, as someone that still write ASM code from time, I use both quite extensively. (I prefer the Intel variant) and both, are literally light years ahead of the horrible documentation available on ARM.
Oh, and by the way--if Intel has not seen fit to implement an interrupt system--starting with the 8080, and even before that--as sophisticated as that found in the Z80 and MC6800, you certainly don't think they're going to do it now, do you? The sheer burden of dealing with the complexities of having to save the environment---and of restoring it---of a "modern" x86 (everything is relative; some might say that "modern x86" is an oxymoron) makes that idea laughable, at the very least.
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