Intel Discloses New CPU Instructions, Enhanced Hardware Feedback Interface (EHFI)

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts
  • Lycanthropist
    Senior Member
    • Jan 2019
    • 176

    #11
    User interrupts? Does that mean we get interrupts in user space like in micro controllers? Or do I misunderstand that completely?

    Comment

    • Alex/AT
      Senior Member
      • May 2019
      • 159

      #12
      Adding some obscure stuff when even the current command set is in dire need of reducing complexity... well, wonder if it is a good idea.

      Comment

      • danmcgrew
        Senior Member
        • Apr 2016
        • 402

        #13
        Originally posted by Lycanthropist View Post
        User interrupts? Does that mean we get interrupts in user space like in micro controllers? Or do I misunderstand that completely?
        You don't 'misunderstand' anything. Even the x86 experts here don't understand enough in order to answer as simple a question as that posed / posted in @#7.

        ***********************

        Oh, and by the way--if Intel has not seen fit to implement an interrupt system--starting with the 8080, and even before that--as sophisticated as that found in the Z80 and MC6800, you certainly don't think they're going to do it now, do you? The sheer burden of dealing with the complexities of having to save the environment---and of restoring it---of a "modern" x86 (everything is relative; some might say that "modern x86" is an oxymoron) makes that idea laughable, at the very least.
        Last edited by danmcgrew; 04 October 2020, 09:13 PM.

        Comment

        • jayN
          Phoronix Member
          • Apr 2020
          • 100

          #14
          is that AMX or avx512 VNNI? Anyway, saturation is nice to have...

          VPDPBUSDS

          Comment

          • gilboa
            Senior Member
            • Oct 2006
            • 1053

            #15
            Originally posted by danmcgrew View Post
            You don't 'misunderstand' anything. Even the x86 experts here don't understand enough in order to answer as simple a question as that posed / posted in @#7.
            Childish trolling aside, the full Intel developer manual can be downloaded from this URL:
            https://www.intel.com/content/dam/ww...ual-325383.pdf

            If you prefer the AMD version, feel free to download it here:


            Free free to count the instructions yourself (as if the number of instructions means anything in this day and age...).

            BTW, as someone that still write ASM code from time, I use both quite extensively. (I prefer the Intel variant) and both, are literally light years ahead of the horrible documentation available on ARM.

            Oh, and by the way--if Intel has not seen fit to implement an interrupt system--starting with the 8080, and even before that--as sophisticated as that found in the Z80 and MC6800, you certainly don't think they're going to do it now, do you? The sheer burden of dealing with the complexities of having to save the environment---and of restoring it---of a "modern" x86 (everything is relative; some might say that "modern x86" is an oxymoron) makes that idea laughable, at the very least.
            Granted, English is not my first language. But, umm, anyone care to translate the above?

            - Gilboa
            oVirt-HV1: Intel S2600C0, 2xE5-2658V2, 128GB, 8x2TB, 4x480GB SSD, GTX1080 (to-VM), Dell U3219Q, U2415, U2412M.
            oVirt-HV2: Intel S2400GP2, 2xE5-2448L, 120GB, 8x2TB, 4x480GB SSD, GTX730 (to-VM).
            oVirt-HV3: Gigabyte B85M-HD3, E3-1245V3, 32GB, 4x1TB, 2x480GB SSD, GTX980 (to-VM).
            Devel-2: Asus H110M-K, i5-6500, 16GB, 3x1TB + 128GB-SSD, F33.

            Comment

            Working...
            X