Intel SPMD Compiler 1.11 Released

[phoronix]

Phoronix: Intel SPMD Compiler 1.11 Released

Intel continues working on its SPMD compiler as part of their SPIR-V translator running on the CPU and other efforts. ISPC is the Intel SPMD Program Compiler and at the end of last week reached its version 1.11 milestone for this C variant compiler designed for single program, multiple data programming...

http://www.phoronix.com/scan.php?page=news_item&px=Intel-SPMD-ISPC-1.11-Released

[Royi]

This great project should get much more attention and developers.
It is really amazing how easy is to get fast code using it.

I would say it is the best Compiler Intel is developing.

[ldesnogu]

Very interesting read about the history of ispc by its creator: https://pharr.org/matt/blog/2018/04/30/ispc-all.html

[FireBurn]

I've read that twice, and I'm still not sure what it is

[ms178]

I've read that twice, and I'm still not sure what it is

From what I understand - and I am not a programmer - think of it as CUDA for CPUs which could make better use of parallelization and vectorization as other means.

[ldesnogu]

From https://ispc.github.io/

ispc is a compiler for a variant of the C programming language, with extensions for "single program, multiple data" (SPMD) programming. Under the SPMD model, the programmer writes a program that generally appears to be a regular serial program, though the execution model is actually that a number of program instances execute in parallel on the hardware. (See the ispc documentation for more details and examples that illustrate this concept.)

ispc compiles a C-based SPMD programming language to run on the SIMD units of CPUs and the Intel Xeon Phi™ architecture; it frequently provides a 3x or more speedup on CPUs with 4-wide vector SSE units and 5x-6x on CPUs with 8-wide AVX vector units, without any of the difficulty of writing intrinsics code. Parallelization across multiple cores is also supported by ispc, making it possible to write programs that achieve performance improvement that scales by both number of cores and vector unit size.

An example of use is a graphics renderer written by DreamWorks: http://tabellion.org/et/paper17/index.html

[Daktyl198]

If this compiler is all about making better use of parallelization, wouldn't it benefit AMD over Intel? Newer AMD chips have consistently proven to be better in multithreaded workloads than Intel chips.

[AndyChow]

If this compiler is all about making better use of parallelization, wouldn't it benefit AMD over Intel? Newer AMD chips have consistently proven to be better in multithreaded workloads than Intel chips.

I think this benefits the intel only SIMD AVX instructions. Basically they process entire vectors of data in a single instructions. It's rather specific use-case.

Often if you can parallelize the data that way, you can probably just run it on the GPU which will end up much faster. Really depends on the specific code.

[ms178]

If this compiler is all about making better use of parallelization, wouldn't it benefit AMD over Intel? Newer AMD chips have consistently proven to be better in multithreaded workloads than Intel chips.

Both Intel and AMD CPU's should profit from ispc in general as it helps a lot to make better use of CPU ressources than most software out there today. But to which extent depends on several factors. But remember, AMD's current AVX/AVX2 implementation isn't that performant as Intel's on a hardware level. Future desktop Intel CPU's will also have AVX-512 support, potentially giving them a lead. Also, as ispc builds on top of LLVM, some implementation details could favor Intel as ispc was developed on Intel hardware. On the other hand, AMD could profit from the higher thread count and Zen 2 is rumored to bring way better AVX/AVX2 performance to the table. I guess it comes down to the specific code in question which would profit more from vectorization or parallelization. If the code favors the former, I guess Intel would be in the lead and AMD if it is the latter.

[Guest]

Wouldn't this be a footgun for Intel? Their CPUs are known for producing enormous amounts of heat in AVX-heavy workloads, prime95/mprime is considered a worse-than-worst-scenario benchmark that isn't representative of real life workloads. Are they going to start to provide expected TDPs of their CPUs in such workloads?