An Initial Look At The Intel Iris Gallium3D Driver Performance

[treba]

There's not much point, IMO - mesamatrix was about tracking feature completeness, and Iris has basically the same feature-set as i965 already (one or two things are broken). Progress is polishing up all the remaining functional issues, and then making it go as fast as possible.

Ah that's great to hear! I thought it's a bit more behind. Have you been so fast because you were able to pick up work from the other gallium drivers or did you port over stuff from i965 (or something else)? And if the former is the case, will performance optimizations potentially also affect radeonsi etc.?

[Kayden]

Ah that's great to hear! I thought it's a bit more behind. Have you been so fast because you were able to pick up work from the other gallium drivers or did you port over stuff from i965 (or something else)? And if the former is the case, will performance optimizations potentially also affect radeonsi etc.?

Lots of read-and-rewrite from i965 (either upstream, or branches I had worked on) and sometimes anv. I have borrowed some ideas from v3d and radeonsi, when not sure how Gallium drivers are supposed to handle something. So far I've fixed some state tracker bugs, added some utility code, and made a few minor improvements, but most of what I've been doing is in the driver and won't directly benefit other drivers. That said, the more of us that share common code, the more likely everyone is to benefit in the future.

Dave Airlie, Chris Wilson, Jason Ekstrand, Jordan Justen, Caio Marcelo de Oliveira Filho, Tim Arceri, and Tapani Pälli have helped here and there as well. Dave in particular has been really encouraging to me as I've been working through all of this. It's been a ton of work.

[s_j_newbury]

Kayden I realise it's not something that interests Intel, but what stops this working back to Ivy Bridge, given IVB has a mostly modern graphics pipeline? How much work would it be?

[airlied]

Kayden I realise it's not something that interests Intel, but what stops this working back to Ivy Bridge, given IVB has a mostly modern graphics pipeline? How much work would it be?

Lack of some VM features like 48bit addresses make the code base for those a lot more complicated.

[Dukenukemx]

So does Gallium Nine work on this driver?

[chithanh]

Nice results. Too bad that Intel did not use the opportunity to also fold their OpenCL driver development into mesa/clover after discontinuing development on beignet. Instead they now have OpenCL Neo for Gen8+ and Iris Gallium3D for Gen9+

[Veerappan]

So does Gallium Nine work on this driver?

From a previous discussion thread, it looks like 'not yet'.

Gallium Nine only does TGSI (not NIR), and Iris only does NIR. There are IR translation layers available, but neither of them have been hooked up (and tested/fixed) for either Gallium Nine or Iris yet.

[bepvte]

To anyone who is trying to test this driver: the linked branch has the source, set the right meson flags (remember to not build drivers you wont use), use the environment variable GALLIUM_DRIvER, and you will also need to patch xorg with the patch below. if you want to use xorg. In my experience xorg would not work (glitching too hard to even see text), but weston did. It looks like its missing enough opengl commands that firefox wont work in it either (nightly on wayland).

--- hw/xfree86/dri2/pci_ids/pci_id_driver_map.h 2018-12-12 11:19:33.181140640 -0500
+++ hw/xfree86/dri2/pci_ids/pci_id_driver_map.h 2018-10-25 10:13:21.000000000 -0400
@@ -70,7 +70,7 @@
    int num_chips_ids;
 } driver_map[] = {
    { 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
-   { 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
+   { 0x8086, "iris", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
 #ifndef DRIVER_MAP_GALLIUM_ONLY
    { 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
    { 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },

[Michael]

Nice results. Too bad that Intel did not use the opportunity to also fold their OpenCL driver development into mesa/clover after discontinuing development on beignet. Instead they now have OpenCL Neo for Gen8+ and Iris Gallium3D for Gen9+

Switching to Clover would be a regression. OpenCL NEO already does OpenCL 2.0+ while Clover is at OpenCL 1.1.

[chithanh]

Switching to Clover would be a regression. OpenCL NEO already does OpenCL 2.0+ while Clover is at OpenCL 1.1.

Now it would be a regression, but my understanding is that Intel started from zero with OpenCL Neo.