AMD Ryzen DDR4 Memory Scaling Tests On Linux

[Ziple]

@Michael: How about benchmarking those scientific CPU tests that behaved oddly before?

If you are referring to the Himeno benchmark, the version used by phoronix in the tests should not see much difference. The himeno source code is actually really poorly optimized and the processor spends its time doing useless computations of indexes of array to access or memory accesses because the C compiler doesn't know there is no aliasing. It is not representative at all of a real optimized scientific application.

Last weekend; I actually spent some time optimizing himeno, and tested on my laptop which has an Intel core i7 4510u. I got almost 4x performance with easy optimizations and a bit of manual AVX2+FMA intrinsic coding.

It is small enough so that I paste it here: (can't attach files apparently). You can compile it with gcc -std=c99 himenobmtxpa.c -g -O3 -mavx2 -mfma -fopenmp -o himenobmtxpa if you want to test it, with openmp to test multithreaded performance as a bonus.

/********************************************************************

 This benchmark test program is measuring a cpu performance
 of floating point operation by a Poisson equation solver.

 If you have any question, please ask me via email.
 written by Ryutaro HIMENO, November 26, 2001.
 Version 3.0
 ----------------------------------------------
 Ryutaro Himeno, Dr. of Eng.
 Head of Computer Information Division,
 RIKEN (The Institute of Physical and Chemical Research)
 Email : [email protected]
 ---------------------------------------------------------------
 You can adjust the size of this benchmark code to fit your target
 computer. In that case, please chose following sets of
 [mimax][mjmax][mkmax]:
 small : 33,33,65
 small : 65,65,129
 midium: 129,129,257
 large : 257,257,513
 ext.large: 513,513,1025
 This program is to measure a computer performance in MFLOPS
 by using a kernel which appears in a linear solver of pressure
 Poisson eq. which appears in an incompressible Navier-Stokes solver.
 A point-Jacobi method is employed in this solver as this method can
 be easily vectorized and be parallelized.
 ------------------
 Finite-difference method, curvilinear coodinate system
 Vectorizable and parallelizable on each grid point
 No. of grid points : imax x jmax x kmax including boundaries
 ------------------
 A,B,C:coefficient matrix, wrk1: source term of Poisson equation
 wrk2 : working area, OMEGA : relaxation parameter
 BND:control variable for boundaries and objects ( = 0 or 1)
 P: pressure
********************************************************************/
/*
 * modified by Ziple, 19/03/2017
 *
 * Optimize a bit the program to be more representative of real (optimized)
 * HPC workloads.
 *
 * Modifications:
 *  - improve performance by specifying that there is no aliasing (restrict keyword)
 *  - share index computations (because matrices are of the same sizes)
 *  - AVX2+FMA intrinsics to optimize for recent x86_64 platforms
 *    (just use -mavx2 and -mfma flags at compilation to enable it)
 *  - OpenMP parallelization
 */

#include <stdio.h>
#include <sys/time.h>
#include <stdlib.h>
#include <string.h>

#if (defined(__AVX2__) || defined(__FMA__))
#include <immintrin.h>
#endif

#define MS(mt, s1, s2, s3, n, r, c, d) mt->m[(n) * (s1) + (r) * (s2) + (c) * (s3) + (d)]
#define MSP(mt, s1, s2, s3, n, r, c, d) mt[(n) * (s1) + (r) * (s2) + (c) * (s3) + (d)]
#define MR(mt,n,r,c,d)  mt->m[(n) * mt->mrows * mt->mcols * mt->mdeps + (r) * mt->mcols* mt->mdeps + (c) * mt->mdeps + (d)]

struct Mat {
  float *restrict m;
  int mnums;
  int mrows;
  int mcols;
  int mdeps;
};

/* prototypes */
typedef struct Mat Matrix;

int newMat(Matrix* Mat, int mnums, int mrows, int mcols, int mdeps);
void clearMat(Matrix* Mat);
void set_param(int i[],char *size);
void mat_set(Matrix* Mat,int l,float z);
void mat_set_init(Matrix* Mat);
float jacobi(int n,Matrix* M1,Matrix* M2,Matrix* M3,
             Matrix* M4,Matrix* M5,Matrix* M6,Matrix* M7);
double fflop(int,int,int);
double mflops(int,double,double);
double second();

float   omega=0.8;
Matrix  a,b,c,p,bnd,wrk1,wrk2;

int
main(int argc, char *argv[])
{
  int    i,j,k,nn;
  int    imax,jmax,kmax,mimax,mjmax,mkmax,msize[3];
  float  gosa,target;
  double  cpu0,cpu1,cpu,flop;
  char   size[10];

  if(argc == 2){
    strcpy(size,argv[1]);
  } else {
    printf("For example: \n");
    printf(" Grid-size= XS (32x32x64)\n");
    printf("\t    S  (64x64x128)\n");
    printf("\t    M  (128x128x256)\n");
    printf("\t    L  (256x256x512)\n");
    printf("\t    XL (512x512x1024)\n\n");
    printf("Grid-size = ");
    scanf("%s",size);
    printf("\n");
  }

  set_param(msize,size);

  mimax= msize[0];
  mjmax= msize[1];
  mkmax= msize[2];
  imax= mimax-1;
  jmax= mjmax-1;
  kmax= mkmax-1;

  target = 60.0;

  printf("mimax = %d mjmax = %d mkmax = %d\n",mimax,mjmax,mkmax);
  printf("imax = %d jmax = %d kmax =%d\n",imax,jmax,kmax);

  /*
   *    Initializing matrixes
   */
  newMat(&p,1,mimax,mjmax,mkmax);
  newMat(&bnd,1,mimax,mjmax,mkmax);
  newMat(&wrk1,1,mimax,mjmax,mkmax);
  newMat(&wrk2,1,mimax,mjmax,mkmax);
  newMat(&a,4,mimax,mjmax,mkmax);
  newMat(&b,3,mimax,mjmax,mkmax);
  newMat(&c,3,mimax,mjmax,mkmax);

  mat_set_init(&p);
  mat_set(&bnd,0,1.0);
  mat_set(&wrk1,0,0.0);
  mat_set(&wrk2,0,0.0);
  mat_set(&a,0,1.0);
  mat_set(&a,1,1.0);
  mat_set(&a,2,1.0);
  mat_set(&a,3,1.0/6.0);
  mat_set(&b,0,0.0);
  mat_set(&b,1,0.0);
  mat_set(&b,2,0.0);
  mat_set(&c,0,1.0);
  mat_set(&c,1,1.0);
  mat_set(&c,2,1.0);

  /*
   *    Start measuring
   */
  nn= 3;
  printf(" Start rehearsal measurement process.\n");
  printf(" Measure the performance in %d times.\n\n",nn);

  cpu0= second();
  gosa= jacobi(nn,&a,&b,&c,&p,&bnd,&wrk1,&wrk2);
  cpu1= second();
  cpu= cpu1 - cpu0;
  flop= fflop(imax,jmax,kmax);

  printf(" MFLOPS: %f time(s): %f %e\n\n",
         mflops(nn,cpu,flop),cpu,gosa);

  nn= (int)(target/(cpu/3.0));

  printf(" Now, start the actual measurement process.\n");
  printf(" The loop will be excuted in %d times\n",nn);
  printf(" This will take about one minute.\n");
  printf(" Wait for a while\n\n");

  cpu0 = second();
  gosa = jacobi(nn,&a,&b,&c,&p,&bnd,&wrk1,&wrk2);
  cpu1 = second();
  cpu = cpu1 - cpu0;

  printf(" Loop executed for %d times\n",nn);
  printf(" Gosa : %e \n",gosa);
  printf(" MFLOPS measured : %f\tcpu : %f\n",mflops(nn,cpu,flop),cpu);
  printf(" Score based on Pentium III 600MHz using Fortran 77: %f\n",
         mflops(nn,cpu,flop)/82,84);

  /*
   *   Matrix free
   */
  clearMat(&p);
  clearMat(&bnd);
  clearMat(&wrk1);
  clearMat(&wrk2);
  clearMat(&a);
  clearMat(&b);
  clearMat(&c);

  return (0);
}

double
fflop(int mx,int my, int mz)
{
  return((double)(mz-2)*(double)(my-2)*(double)(mx-2)*34.0);
}

double
mflops(int nn,double cpu,double flop)
{
  return(flop/cpu*1.e-6*(double)nn);
}

void
set_param(int is[],char *size)
{
  if(!strcmp(size,"XS") || !strcmp(size,"xs")){
    is[0]= 32;
    is[1]= 32;
    is[2]= 64;
    return;
  }
  if(!strcmp(size,"S") || !strcmp(size,"s")){
    is[0]= 64;
    is[1]= 64;
    is[2]= 128;
    return;
  }
  if(!strcmp(size,"M") || !strcmp(size,"m")){
    is[0]= 128;
    is[1]= 128;
    is[2]= 256;
    return;
  }
  if(!strcmp(size,"L") || !strcmp(size,"l")){
    is[0]= 256;
    is[1]= 256;
    is[2]= 512;
    return;
  }
  if(!strcmp(size,"XL") || !strcmp(size,"xl")){
    is[0]= 512;
    is[1]= 512;
    is[2]= 1024;
    return;
  } else {
    printf("Invalid input character !!\n");
    exit(6);
  }
}

int
newMat(Matrix* Mat, int mnums,int mrows, int mcols, int mdeps)
{
  Mat->mnums= mnums;
  Mat->mrows= mrows;
  Mat->mcols= mcols;
  Mat->mdeps= mdeps;
  Mat->m= NULL;
  Mat->m= (float*)
    malloc(mnums * mrows * mcols * mdeps * sizeof(float));

  return(Mat->m != NULL) ? 1:0;
}

void
clearMat(Matrix* Mat)
{
  if(Mat->m)
    free(Mat->m);
  Mat->m= NULL;
  Mat->mnums= 0;
  Mat->mcols= 0;
  Mat->mrows= 0;
  Mat->mdeps= 0;
}

void
mat_set(Matrix* Mat, int l, float val)
{
  int i,j,k;

    for(i=0; i<Mat->mrows; i++)
      for(j=0; j<Mat->mcols; j++)
        for(k=0; k<Mat->mdeps; k++)
          MR(Mat,l,i,j,k)= val;
}

void
mat_set_init(Matrix* Mat)
{
  int  i,j,k,l;
  float tt;

  for(i=0; i<Mat->mrows; i++)
    for(j=0; j<Mat->mcols; j++)
      for(k=0; k<Mat->mdeps; k++)
        MR(Mat,0,i,j,k)= (float)(i*i)
          /(float)((Mat->mrows - 1)*(Mat->mrows - 1));
}

inline int min(int a, int b) { return a < b ? a : b; }
#define TILE_I 8
#define TILE_J 8
#define TILE_K 8    

float
jacobi_core(
       int imax, int jmax, int kmax,
       int i1, int i2, int i3, int nn,
       float *restrict a, float *restrict b,
       float *restrict c, float *restrict p,
       float *restrict bnd, float *restrict wrk1,
       float *restrict wrk2)
{
  float gosa;
  __m256 gosas;
  __m256 omegas = _mm256_set1_ps(omega);

  for(int n = 0; n < nn; n++) {
    gosa = 0.0f;
    gosas = _mm256_set1_ps(0.0f);

    #pragma omp parallel for
    for(int i = 1; i< imax ; i++) {
      for(int j =1; j < jmax; j++) {
    int kk = 1;
#if (defined(__AVX2__) && defined(__FMA__))
    while( (kk + TILE_K) <= kmax ) {
            int k0 = kk;

        __m256 a0p = _mm256_mul_ps(_mm256_loadu_ps(&MSP(a, i1, i2, i3, 0, i, j, k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0, i+1, j, k0)));
        __m256 lt0p = _mm256_sub_ps(_mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i+1,j+1,k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i+1,j-1,k0)));
        __m256 rt0p = _mm256_sub_ps(_mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i-1,j-1,k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i-1,j+1,k0)));
        __m256 t0p = _mm256_add_ps( lt0p, rt0p);
        __m256 a0pb0p = _mm256_fmadd_ps(_mm256_loadu_ps(&MSP(b, i1, i2, i3, 0, i, j, k0)), t0p, a0p);


        __m256 a1p = _mm256_mul_ps(_mm256_loadu_ps(&MSP(a, i1, i2, i3, 1, i, j, k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0, i, j+1, k0)));
        __m256 lt1p = _mm256_sub_ps(_mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i,j+1,k0+1)), _mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i,j-1,k0+1)));
        __m256 rt1p = _mm256_sub_ps(_mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i,j-1,k0-1)), _mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i,j+1,k0-1)));
        __m256 t1p = _mm256_add_ps( lt1p, rt1p);
        __m256 a1pb1p = _mm256_fmadd_ps(_mm256_loadu_ps(&MSP(b, i1, i2, i3, 1, i, j, k0)), t1p, a1p);


        __m256 a2p = _mm256_mul_ps(_mm256_loadu_ps(&MSP(a, i1, i2, i3, 2, i, j, k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0, i, j, k0+1)));
        __m256 lt2p = _mm256_sub_ps(_mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i+1,j,k0+1)), _mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i-1,j,k0+1)));
        __m256 rt2p = _mm256_sub_ps(_mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i-1,j,k0-1)), _mm256_loadu_ps(&MSP(p, i1, i2, i3,0,i+1,j,k0-1)));
        __m256 t2p = _mm256_add_ps( lt2p, rt2p);
        __m256 a2pb2p = _mm256_fmadd_ps(_mm256_loadu_ps(&MSP(b, i1, i2, i3, 2, i, j, k0)), t2p, a2p);

        __m256 c0p = _mm256_mul_ps(_mm256_loadu_ps(&MSP(c, i1, i2, i3, 0, i, j, k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0, i-1, j, k0)));
        __m256 c1p = _mm256_mul_ps(_mm256_loadu_ps(&MSP(c, i1, i2, i3, 1, i, j, k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0, i, j-1, k0)));
        __m256 c2p = _mm256_mul_ps(_mm256_loadu_ps(&MSP(c, i1, i2, i3, 2, i, j, k0)), _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0, i, j, k0-1)));

        __m256 a0pb0pc0p = _mm256_add_ps(a0pb0p, c0p);
        __m256 a1pb1pc1p = _mm256_add_ps(a1pb1p, c1p);
        __m256 a2pb2pc2p = _mm256_add_ps(a2pb2p, c2p);

        __m256 a0pb0pc0pa1pb1pc1p = _mm256_add_ps(a0pb0pc0p, a1pb1pc1p);
        __m256 a2pb2pc2pwrk1 = _mm256_add_ps(a2pb2pc2p, _mm256_loadu_ps(&MSP(wrk1, i1, i2, i3, 0, i, j, k0)));
        __m256 s0s = _mm256_add_ps(a0pb0pc0pa1pb1pc1p, a2pb2pc2pwrk1);

        __m256 p0s = _mm256_loadu_ps(&MSP(p, i1, i2, i3, 0,i,j,k0));
        __m256 sss = _mm256_mul_ps(_mm256_fmsub_ps(s0s, _mm256_loadu_ps(&MSP(a, i1, i2, i3, 3,i,j,k0)), p0s), _mm256_loadu_ps(&MSP(bnd, i1, i2, i3, 0,i,j,k0)));

        gosas = _mm256_fmadd_ps(sss, sss, gosas);
            _mm256_storeu_ps(&MSP(wrk2,i1, i2, i3, 0,i,j,k0), _mm256_fmadd_ps(omegas, sss, p0s));
      kk += TILE_K;
    }
#endif // AVX2 && FMA
    for(int k = kk; k < kmax; k++) {
      float s0= MSP(a, i1, i2, i3,0,i,j,k)*MSP(p, i1, i2, i3,0,i+1,j,  k)
            + MSP(a, i1, i2, i3,1,i,j,k)*MSP(p, i1, i2, i3,0,i,  j+1,k)
            + MSP(a, i1, i2, i3,2,i,j,k)*MSP(p, i1, i2, i3,0,i,  j,  k+1)
            + MSP(b, i1, i2, i3,0,i,j,k)
              *( MSP(p, i1, i2, i3,0,i+1,j+1,k) - MSP(p, i1, i2, i3,0,i+1,j-1,k)
               - MSP(p, i1, i2, i3,0,i-1,j+1,k) + MSP(p, i1, i2, i3,0,i-1,j-1,k) )
            + MSP(b, i1, i2, i3,1,i,j,k)
              *( MSP(p, i1, i2, i3,0,i,j+1,k+1) - MSP(p, i1, i2, i3,0,i,j-1,k+1)
               - MSP(p, i1, i2, i3,0,i,j+1,k-1) + MSP(p, i1, i2, i3,0,i,j-1,k-1) )
            + MSP(b, i1, i2, i3,2,i,j,k)
              *( MSP(p, i1, i2, i3,0,i+1,j,k+1) - MSP(p, i1, i2, i3,0,i-1,j,k+1)
               - MSP(p, i1, i2, i3,0,i+1,j,k-1) + MSP(p, i1, i2, i3,0,i-1,j,k-1) )
            + MSP(c, i1, i2, i3,0,i,j,k) * MSP(p, i1, i2, i3,0,i-1,j,  k)
            + MSP(c, i1, i2, i3,1,i,j,k) * MSP(p, i1, i2, i3,0,i,  j-1,k)
            + MSP(c, i1, i2, i3,2,i,j,k) * MSP(p, i1, i2, i3,0,i,  j,  k-1)
            + MSP(wrk1, i1, i2, i3, 0,i,j,k);

          float ss= (s0*MSP(a, i1, i2, i3, 3,i,j,k) - MSP(p, i1, i2, i3, 0,i,j,k))*MSP(bnd, i1, i2, i3, 0,i,j,k);

          gosa+= ss*ss;
          MSP(wrk2,i1, i2, i3, 0,i,j,k) = MSP(p,i1, i2, i3, 0,i,j,k) + omega*ss;
    }
      }
    }

    for(int i = 1; i < imax; i++)
      for(int j = 1; j < jmax; j++)
        for(int k = 1; k < kmax; k++)
          MSP(p, i1, i2, i3, 0,i,j,k)= MSP(wrk2, i1, i2, i3, 0,i,j,k);

  } /* end n loop */

  for(int i = 0; i < 8; i++)
    gosa += gosas[i];

  return(gosa);
}

float
jacobi(int nn, Matrix* a,Matrix* b,Matrix* c,
       Matrix* p,Matrix* bnd,Matrix* wrk1,Matrix* wrk2)
{
  int imax= p->mrows-1;
  int jmax= p->mcols-1;
  int kmax= p->mdeps-1;

  int i1 = p->mrows * p->mcols * p->mdeps;
  int i2 = p->mcols * p->mdeps;
  int i3 = p->mdeps;

  return jacobi_core(imax, jmax, kmax, i1, i2, i3, nn, a->m, b->m, c->m,
                     p->m, bnd->m, wrk1->m, wrk2->m);
}

double
second()
{

  struct timeval tm;
  double t ;

  static int base_sec = 0,base_usec = 0;

  gettimeofday(&tm, NULL);

  if(base_sec == 0 && base_usec == 0)
    {
      base_sec = tm.tv_sec;
      base_usec = tm.tv_usec;
      t = 0.0;
  } else {
    t = (double) (tm.tv_sec-base_sec) +
      ((double) (tm.tv_usec-base_usec))/1.0e6 ;
  }

  return t ;
}

I am sure people can optimize it way further .
Edit: it won't compile without -mavx2 and -mfma flags because of stupid mistakes, can't really fix them on my phone.

[Michael]

The 1.0 Bios revision for that board takes about a minute to post for me, and if you add in additional SATA devices and cards, it takes even longer. The newer BIOS revisions lower that POST time to something more respectable (although it's not great yet).

If you've waited a good 2-3 minutes, and nothing is happening yet, obviously try clearing the CMOS (jumper is next to the battery, must be done while the power supply is plugged in). When I first built my B350, I waited 5-10 minutes for it to post and nothing happened (I knew to expect long post times, but nothing over 2 minutes had been reported). I cleared the CMOS and it posted successfully next time I powered it on.

If it died during/after the bios flash, there's a recovery method you can try where you can get the board to flash back to the previous BIOS version that was installed using a prepared USB key:

https://forum-en.msi.com/index.php?topic=269702.0 (general guide on recovery)
https://forum-en.msi.com/index.php?t...133#msg1606036 (specifics about someone doing this on the B350)
https://forum-en.msi.com/index.php?t...105#msg1605973 (where that guy was lamenting his paused/failed update that eventually got fixed)

After clearing the CMOS I got the board to boot, but its a red screen. But have been busy with Mad Max Vulkan tests that I won't mess around with it anymore until tonight or tomorrow. It hadn't died during a flash as didn't even get around to upgrading it.

[Veerappan]

Looks like my B350 board may be dead... That system doesn't want to POST anymore.

The 1.0 Bios revision for that board takes about a minute to post for me, and if you add in additional SATA devices and cards, it takes even longer. The newer BIOS revisions lower that POST time to something more respectable (although it's not great yet).

If you've waited a good 2-3 minutes, and nothing is happening yet, obviously try clearing the CMOS (jumper is next to the battery, must be done while the power supply is plugged in). When I first built my B350, I waited 5-10 minutes for it to post and nothing happened (I knew to expect long post times, but nothing over 2 minutes had been reported). I cleared the CMOS and it posted successfully next time I powered it on.

If it died during/after the bios flash, there's a recovery method you can try where you can get the board to flash back to the previous BIOS version that was installed using a prepared USB key:

https://forum-en.msi.com/index.php?topic=269702.0 (general guide on recovery)
https://forum-en.msi.com/index.php?t...133#msg1606036 (specifics about someone doing this on the B350)
https://forum-en.msi.com/index.php?t...105#msg1605973 (where that guy was lamenting his paused/failed update that eventually got fixed)

[starshipeleven]

I don't really know what PSP is -

PSP is Platform Security Processor, the AMD equivalent of Intel's IME bullshit. Don't know what that option does though, I was hoping it was something that disables it or disables access to it.

However on the ASRock X370- Boards around 170€(you might convert this to your currency) it shows XXXXMB and there are authentic proofs that it also practically works.

I'm european, and with true ECC support that's a good price. Sure I hope all boards have ECC enabled, but that's already what I was hoping for (that they kept ECC support with consumer boards).

[Mark Rose]

Could someone make tests of Ryzen with 64 GBytes of RAM at different clockspeeds? There were some slides showing that the memory clock is limited to 1866MHz with 4 dual-ranked modules. It would be very disappointing if that's true.

I remember hearing higher numbers than that in a video, but I can't remember where. It might have been Wendell @ Level1. Something like 2400 or 2666 working for all configurations, including 4 dual rank modules. (I'm running 4 dual rank DDR*3*-2400 sticks in the system I'm typing this on, so it's not like four sticks, dual rank, dual channel, 2400 MHz is a new thing.)

[dungeon]

Off-topic: do both fan headers fully work on your model? I've got the AM1I-A and the CHA-FAN header will only work at 12 V, regardless of BIOS settings. I've swapped fans to check if the problem came from the fan, but the result was the same: the chassis fan header will only do 12 V.

This might've been fixed by a newer BIOS version though. I did those tests a couple of months ago.

It works here... but as schmidtbag said maybe your fan does not understand something. You can set/control that in bios as DC if it is 3pin fan or PWM mode if 4pin depending on fan one should work i guess. Or you can disable both modes, to work at max speed or something

Blah, even 2pin fans should work on gnd/pwr only... just don't dare to put jumper on these!!!

[schmidtbag]

Off-topic: do both fan headers fully work on your model? I've got the AM1I-A and the CHA-FAN header will only work at 12 V, regardless of BIOS settings. I've swapped fans to check if the problem came from the fan, but the result was the same: the chassis fan header will only do 12 V.

This might've been fixed by a newer BIOS version though. I did those tests a couple of months ago.

Is it a 4-pin header? Some mobos will strictly use PWM to control fan speeds. But, even if it is a 4-pin header and you're using a 4-pin fan, not all 4-pin fans seem to understand PWM signals (interestingly, the fan I'm thinking of is an Asus fan...).

If you can, try using a different fan and see if that helps. I wouldn't bank on a BIOS update.

[Holograph]

Asus is probably best one who even wanna speak anything with you about Linux... So saying that Asus is garbage to me is equal to saying that Linux is garbage

Asus tried to screw me over without any mention of Linux and I am not aware of them being considered Linux-friendly. I wouldn't say they're consumer-friendly at all, regardless of OS.

I'll change my wording of garbage, but only so people might take my post a bit more seriously. I honestly think they are significantly worse than other brands.

I've owned many Gigabyte boards, many Asus boards, a few ASRock (and lots of other brands that have since gone OOB)... I was very unhappy with a Gigabyte Z68XP board that had an extremely buggy BIOS, but otherwise I liked Gigabyte boards more. Their X370 board would not be a consideration for me, but for reasons other than quality that don't really need to be mentioned in detail.

[wdb974]

He, he, my Asus AM1M-A mobo get bios updates about 15 times for the first 2+ years . I didn't expected they will support cheap platform and cheap mobo nowhere near that much, but for some reason they did.

Off-topic: do both fan headers fully work on your model? I've got the AM1I-A and the CHA-FAN header will only work at 12 V, regardless of BIOS settings. I've swapped fans to check if the problem came from the fan, but the result was the same: the chassis fan header will only do 12 V.

This might've been fixed by a newer BIOS version though. I did those tests a couple of months ago.

[schmidtbag]

Holograph
I'm inclined to agree, though garbage is a bit strong of a word. To me, Asus is like the General Motors of PCs - they built up a great reputation when they first started, but despite the drop in quality over the years, people still hold onto their initial impressions. I don't remember the last time I encountered an Asus motherboard that I liked (or at least thought was better than competing boards). It seems they dump all their R&D resources into their top-tier Intel boards and then slack off with everything else. The way I see it, I'm sure ASRock separated from Asus for a reason.


EDIT:
dungeon
In my experience, Asus is equally adamant about not supporting Linux as Gigabyte. Most of Asus' products make it very clear they have no Linux support. The major difference is Asus is often contracted by companies like Dell to make their motherboards. Since Dell is semi Linux-friendly, Asus is too by association. Not that that's so great either, because these are the real crappy boards that use cheap components and lack many features. Most Asus boards that aren't related to OEM contracts are not Linux-friendly.

Personally, I'm not aware of any mobo brand that is Linux-friendly.