Hammering The AMD Ryzen 7 1800X With An Intense, Threaded Workload

[torsionbar28]

More powerful cpu demonstrates better performance -- they suggest gimping it while calling it overpriced. Seems legit.

^ Sounds like someone doesn't understand the purpose of benchmarking.

[duby229]

If what you are implying is that the purpose of benchmarking is to gimp one product so as to try to extrapolate its results onto another product, then you are wrong. I mean it is ok to compare against different configurations as long as you never ever say to the reader that it represents some other product that its not.

[duby229]

Seriously you guys aren't surprised by the SMT results are you? Some of you show signs of shock or indignation about it. Surprise, suprise! Intel's architecture has the same flaw! The difference is that Intel's cache hierarchy in total has much lower latency than AMD, even Zen. Memory bandwidth will improve once BIOS bugs get fixed, but the fact is that memory accesses on Intel products are much faster. And SMT puts very serious demand on low latency access. (Due to context changes and pipeline flushes)

I still think it's pretty darn stupid for AMD to make an attempt to compete with Intel on Intel's home field. CMT was by far the better design. It still has the potential to annihilate everything else if AMD would just shrink it to 14nm and scale it up to 3 integer units per pipeline.

[torsionbar28]

If what you are implying is that the purpose of benchmarking is to gimp one product so as to try to extrapolate its results onto another product, then you are wrong. I mean it is ok to compare against different configurations as long as you never ever say to the reader that it represents some other product that its not.

Testing != extrapolating. If the assertion is that 5960X's performance lead in this benchmark is due to memory bandwidth, the logical next step is to test that hypothesis by disabling two of its channels and re-running the tests. If in that case, 5960X's performance lead disappears, we can conclude that yes, memory bandwidth is indeed playing a significant role in this benchmark. This isn't extrapolation; this is applying the scientific method to test a hypothesis.

[Brane215]

Seriously you guys aren't surprised by the SMT results are you? Some of you show signs of shock or indignation about it. Surprise, suprise! Intel's architecture has the same flaw! The difference is that Intel's cache hierarchy in total has much lower latency than AMD, even Zen. Memory bandwidth will improve once BIOS bugs get fixed, but the fact is that memory accesses on Intel products are much faster. And SMT puts very serious demand on low latency access. (Due to context changes and pipeline flushes)

I still think it's pretty darn stupid for AMD to make an attempt to compete with Intel on Intel's home field. CMT was by far the better design. It still has the potential to annihilate everything else if AMD would just shrink it to 14nm and scale it up to 3 integer units per pipeline.

WTF are you talking about ? What has CMT/SMT to do with connecting fabric ? Yes, AMD's interconnect might be somewhat slower, but that was expected.
But that os far from critical. It's intentinal compromise, which, once people sort their code, won't even be noticed by most.
For those in that 1%, well, there is always Xeon.

Sheer memory latency is also non-issue for most code, except those few casees with high mispredict percentage. Context change time depends more on bandwidth than a relatively small access time difference.

And even in this test, without any change, things get much more in AMD's favor once you factor in the price and power consumption.

Local early adopters can't stop praising it on cumulative CPU power alone. People say it's in class of its own. It overclocks chldishly easily.

All that for €400. What more do you want ?

[duby229]

WTF are you talking about ? What has CMT/SMT to do with connecting fabric ? Yes, AMD's interconnect might be somewhat slower, but that was expected.
But that os far from critical. It's intentinal compromise, which, once people sort their code, won't even be noticed by most.
For those in that 1%, well, there is always Xeon.

Sheer memory latency is also non-issue for most code, except those few casees with high mispredict percentage. Context change time depends more on bandwidth than a relatively small access time difference.

And even in this test, without any change, things get much more in AMD's favor once you factor in the price and power consumption.

Local early adopters can't stop praising it on cumulative CPU power alone. People say it's in class of its own. It overclocks chldishly easily.

All that for €400. What more do you want ?

The only thing you said there that I disagree with is the importance of access latency on context changes or other pipeline flushes. It's bad, real bad, even on Intel's architecture. It's somewhat mitigated on Intel's architecture due to much lower cache hierarchy latency and that's something AMD will -never- overtake Intel in and that's why I think it was dumb.

EDIT: You do realize the whole purpose for SMT right? The bottom line fact is that Intel -overengineered- their architecture and could not keep the pipeline full. Every context switch caused the pipeline to flush and refill. (It still does this on every context change) So they adapted an SMT technique called Hyperthreading to try and keep the pipeline full by issueing a second thread so that at all times the pipeline could be doing work. In later generations they extended it by adding additional integer units to the pipeline, and that even exacerbated the problem even more.

[Holograph]

More powerful cpu demonstrates better performance -- they suggest gimping it while calling it overpriced. Seems legit.

Completely ridiculous and you made a fool out of yourself with that incredible lack of understanding. We just want to figure out WHY the Intel is faster, and what AMD (or users) would need to do to bring Ryzen performance more in-line with the Intel. For example I want to know that if AMD were to figure out some microcode/BIOS updates that made it easy to run the RAM at, say, 2800-3000MHz, would that boost performance significantly?

Why bother wasting the time to reply if you're not first going to spend some time to understand?

[Brane215]

EDIT: You do realize the whole purpose for SMT right? The bottom line fact is that Intel -overengineered- their architecture and could not keep the pipeline full. Every context switch caused the pipeline to flush and refill. (It still does this on every context change).

There is more to SMT than just number of execution units. More threads mean more cache banks occupied, more cache aliasings etc. Also, it means keeping TWO contexts at the time. It's obvious that one has to choose those two thread carefully in order to be able to reap (some?) benefits from that. This is, I suspect, even more dependant on various sublteties and has to be tailored per-chip.

[torsionbar28]

And even in this test, without any change, things get much more in AMD's favor once you factor in the price and power consumption.

Local early adopters can't stop praising it on cumulative CPU power alone. People say it's in class of its own. It overclocks chldishly easily.

It's true, the fact that in many multithreaded benchmarks, this 95w CPU is equalling or besting a 140w CPU from intel is remarkable. The intel part at twice the price having more memory bandwidth is only relevant in a few specific scenarios.