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The Linux Kernel Continues Prepping For POWER9 Support

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  • The Linux Kernel Continues Prepping For POWER9 Support

    Phoronix: The Linux Kernel Continues Prepping For POWER9 Support

    IBM continues prepping the Linux kernel for supporting the upcoming POWER9 processors...

    http://www.phoronix.com/scan.php?pag....8-More-POWER9

  • #2
    How about power envelope? Or efficiency? While fast, Power CPU's are notorious power hogs.
    There are not many applications left that do not care about compute/power density in HPC solutions.
    Cooling is still a major issue. As is consumption.

    The industry does care about ISA's any more. Simply put, if a platform yields better compute/power density, it is usually chosen. If economical constraints allow it.
    The rest is fixable code. Especially in HPC solutions.

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    • #3
      Originally posted by milkylainen View Post
      How about power envelope? Or efficiency? While fast, Power CPU's are notorious power hogs.
      There are not many applications left that do not care about compute/power density in HPC solutions.
      Cooling is still a major issue. As is consumption.

      The industry does care about ISA's any more. Simply put, if a platform yields better compute/power density, it is usually chosen. If economical constraints allow it.
      The rest is fixable code. Especially in HPC solutions.
      As I understand it, that's exactly what they've been working on. I think the POWER9 ISA is probably there to make sure that it remains a patent minefield so that IBM can keep control of it while they push their "Open" POWER initiative.

      I think they will lose and lose painfully to RISC-V; even research RISC-V machines with source available (under commercial-friendly licenses) are approaching the performance of today's Intels with vastly simpler designs. The open licensing and the blossoming collaborative community have made immense progress in just the last two years; and there are defense industry products already shipping RISC-V.

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      • #4
        Originally posted by microcode View Post
        RISC-V machines […] approaching the performance of today's Intels
        Do you have a link for this?

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        • #5
          Originally posted by microcode View Post
          I think they will lose and lose painfully to RISC-V;
          IBM is a platinum founding member of RISC-V foundation (among pretty much everyone apart Intel and crap chinese IC manufacturers). Not gonna "lose" against themselves.

          even research RISC-V machines with source available (under commercial-friendly licenses) are approaching the performance of today's Intels with vastly simpler designs.
          Pics or GTFO, as they say.

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          • #6
            Originally posted by starshipeleven View Post
            IBM is a platinum founding member of RISC-V foundation (among pretty much everyone apart Intel and crap chinese IC manufacturers). Not gonna "lose" against themselves.

            Pics or GTFO, as they say.
            Nobody says "Pics or GTFO". They say "Tits or GTFO" or "Pics or it didn't happen.".

            In either case, nobody is stopping you from watching some talks on youtube, reading a whitepaper, or downloading and running the designs yourself on an FPGA. If you're not even willing to do that, then why is the burden on me to prove it?

            The Berkeley out-of-order machine (BOOM) is the most promising open source design of the Out of Order Superscalar variety. It's also likely that there are (unpublished) faster RISC-V OoO superscalars to be taped out in the coming years. NVIDIA is also choosing to integrate a RISC-V core as the realtime controller in their upcoming GeForce, Quadro, and Tegra chipsets to replace their proprietary Falcon cores.
            Last edited by microcode; 08-01-2016, 05:08 AM.

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            • #7
              Originally posted by microcode View Post
              Nobody says "Pics or GTFO". They say "Tits or GTFO" or "Pics or it didn't happen.".
              http://www.urbandictionary.com/defin...cs%20or%20gtfo
              http://www.thecrimsonflame.com/t2607p45-pics-or-gtfo
              http://iwastesomuchtime.com/on/?i=16735
              https://twitter.com/picorgtfo

              If you're not even willing to do that, then why is the burden on me to prove it?
              Because otherwise I would be busy proving myself all inane shit I see someone claim around, while the man making the claim should have some kind of thing on-hand because it's the thing that convinced him and should be easy for him to show me too.

              The Berkeley out-of-order machine (BOOM) is the most promising open source design of the Out of Order Superscalar variety.
              These are not the pics we were looking for.

              You said "RISC-V machines with source available (under commercial-friendly licenses) are approaching the performance of today's Intels".

              Please show some evidence of this.

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              • #8
                Originally posted by starshipeleven View Post
                http://www.urbandictionary.com/defin...cs%20or%20gtfo
                http://www.thecrimsonflame.com/t2607p45-pics-or-gtfo
                http://iwastesomuchtime.com/on/?i=16735
                https://twitter.com/picorgtfo

                Because otherwise I would be busy proving myself all inane shit I see someone claim around, while the man making the claim should have some kind of thing on-hand because it's the thing that convinced him and should be easy for him to show me too.

                These are not the pics we were looking for.

                You said "RISC-V machines with source available (under commercial-friendly licenses) are approaching the performance of today's Intels".

                Please show some evidence of this.
                There is no evidence, because that claim is pure bullshit! RISC-V fanboys are getting ridiculous...

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                • #9
                  Originally posted by Zetbo View Post
                  There is no evidence, because that claim is pure bullshit!
                  Yeah, I'm somewhat expecting it is.
                  I'm following RISC-V relatively closely since a while, I would have noticed any such major news.

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                  • #10
                    Originally posted by microcode View Post
                    Nobody says "Pics or GTFO". They say "Tits or GTFO" or "Pics or it didn't happen.".

                    Comment

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