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  • #31
    Originally posted by milkylainen View Post

    From the point I see it, there is nothing more to add to your statement.
    What you are saying is correct. The ASIC itself is pretty much immutable (besides firmware modifiable behavior) . But you cannot account for the behavior for the ASIC. There is absolutely no guarantee that secret opcodes cannot be unlocked with opcode knocking or something else. These opcodes would give you the power to manipulate memory access or just traverse whatever you like in the highest privilege settings of the ASIC. There is no "inspection" of ASIC behavior. You just have to trust it. Ergo, black box.
    This is highly incompatible with the view I have with OSS hardware.
    I agree with everything you're saying, but how is this issue unique to this particular Raptor POWER8 hardware? Isn't this true for ALL commercially available personal computers today, regardless of vendor or processor architecture? Are there any examples of a commercially available computer that *is* compatible with your view on OSS hardware? Thanks for explaining BTW.

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    • #32
      Originally posted by milkylainen View Post
      Free/OSS solution is a pipe dream. The CPU is an IBM ASIC right? Done, moot point etc. You have absolutely 0 control over what has been implemented in the ASIC unless you are guaranteed to have the code that was put to production for inspection. Even if you did, there is absolutely 0 guarantee of a late masking on the CPU.
      Unless you produce your own hardware in your own controlled fabs with people you absolutely trust, ... well... I don't think need to explain more.

      You've got a fair point. Hardware isn't something we can produce with a simple compilation. That being said, one must recognize that what IBM is doing with OpenPOWER Foundation is a right step in the open source direction.

      Wikipedia - OpenPOWER Foundation
      https://en.wikipedia.org/wiki/OpenPOWER_Foundation

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      • #33
        I would be willing to bet that the system Michael had access to was an 8-core system, where one core was configured 1-threaded and the seven others were configured 8-threaded.

        Michael, depending on your level of access, could you please benchmark with all cores set to 1, 2, 4 and 8 threads? There are only 2 vector binary floating-point units per core, so I expect performance will decrease beyond 2 or 4 threads / core simply due to competition for cache.

        Also, could you please run benchmarks that let us put a GFLOPS number to this system?

        What exactly are the FPGAs in the system? Can they be used for heavy-duty computation?

        Lastly, will TALOS include a GPU option eventually, preferably Nvidia (disregarding the fact that it's non-free)? That would make it much more interesting as a machine-learning trainer hardware.

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        • #34
          Originally posted by zuxun View Post
          Was openssl single threaded? POWER is made for multithreading.

          1 thread vs 1 thread it cannot compete with Xeon.

          Many threads vs Many threads it can compete with Xeon. This is how POWER is designed.

          I would know this since i am a multithreading guru.

          Each POWER7 core runs 4 threads.

          Each POWER8 core runs 8 threads. I don't know how many TALOS can run because there is no information in their website.

          It is probable that TALOS 8 core can run 64 threads.
          That is not the problem. The issue is that OpenSSL used C code without AltiVec (vector instructions) on POWER when it uses assembly with vector instructions on amd64. Although I do not have much time to scrutinize things, I currently have SSH access to the prototype. I plan to investigate whether OpenSSL can be improved by telling the compiler to vectorize as soon as I get a chance in my evening.

          By the way, the installed OS is little endian, which does not currently have Gentoo Prefix support. POWER hardware allows you to pick endianness when installing the OS, so that is not by any means a limitation of the hardware. Page 3 of michael's benchmarks were also surprising well done in comparison to his usual benchmarking. It had explanations of what the numbers meant and caught on to the RSA result not reflecting the hardware's actual capabilities.
          Last edited by ryao; 02-09-2016, 03:41 PM.

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          • #35
            Originally posted by torsionbar28 View Post

            I agree with everything you're saying, but how is this issue unique to this particular Raptor POWER8 hardware? Isn't this true for ALL commercially available personal computers today, regardless of vendor or processor architecture? Are there any examples of a commercially available computer that *is* compatible with your view on OSS hardware? Thanks for explaining BTW.
            It is true for all commercially available PC's. And realistically, there are no alternatives. I commend some efforts to build an open source cpu (OpenRISC / Sparc Leon's etc). But in reality no open source community can put the effort down to produce the massive amount of man-hours needed to construct an contemporary counterpart to the commercially available alternatives.

            States/Countries with a lot more resources can spend money on research institutes and universities to build their own architectures (China / Russia) with their own taped out CPU samples. But for me, as a mere mortal, I'm stuck with whatever is produced by megacorp inc's.

            This is far better than most other alternatives, but with regard to the holy grail (the CPU and GPU nowdays), no useful progress has been made since.. forever.

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            • #36
              Looking at the benchmark compilation parameters, I saw you are using "--with-cpu=power7". I am wondering why you are using it? I would expect that using the PowerISA 2.07 (POWER8) would help the benchmark to exploit new (POWER8-only) instructions that would have better performance, as, for example new SIMD instructions. Hardware Transaction Memory instructions only showed up on POWER8 ISA.

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