First Linux Benchmarks Of AMD FX-8150 Bulldozer

[deanjo]

Yes sure. but i think its like fighting again brain-death zombies they never understand the True nature.

Compilers only work for Integer and Floating point calculations but not for SIMD SSE,SSE2,SSE3,SSE4.2,AVX,FMA3,FMA4,XOP calculations.

Because these SIMD operations are not logical and not causality but a Compiler only abstract the Logical and Causality from a Logical program language construct to an 01 Computer code for the Integer or Floating point unit.

In a world of 100% compiler makes the work there is no SIMD(SSE-unit)

Well even with Integer and Floating point calculations you can still get even better performance with fine tuned hand written optimizations. But I will still give you a gold star. ;D

[pingufunkybeat]

Is this a new forum gimmick? Deanjo's golden stars?

[deanjo]

Is this a new forum gimmick? Deanjo's golden stars?

Did you want one too? lol

[curaga]

I disagree. Intel regularly uses it's monopoly to force it's technology on everybody, and the constant influx of SSE instructions are what keep the x86 monopoly going. AMD could come up with their own instructions, but how well do you think they would do with incompatible instructions and significantly less marketshare? Furthermore, there's only so many instructions that are actually useful, Intel could sue them for IP infringement if anything was deemed to similar.

If the new instructions were actually useful, they would get used. See Via Padlock, being supported in nearly every relevant sw (you can even mine bitcoins on it, as fast as on an Intel quad ).

[deanjo]

If AMD were to start doing their own thing with instructions, then AMD's x86 would quickly turn into a fringe server architecture that only runs operating systems specially compiled for it with GCC, like any other number of CPUs from IBM, Sun, etc... So following Intel's lead is still their best option, and things won't change until regulators grow a pair and decide to break up the Intel monopoly racket.

Can't say I agree there since quite the opposite happened when AMD did introduce x86-64 extensions which where quite different then anything intel was offering at the time.

[PsynoKhi0]

You say it needs improvements in the kernel, well who exactly stopped AMD from pushing this 1 year ago when they had their first Bulldozer samples ready, could test and all of that. That's how you do things, not wait till it's out, then say, oh but it will work better with these.

Fear of giving away too much info too early? Last minute die changes? I'm actually curious.
I do think BD has had a fairly catastrophic release, though people paint all black way too fast.

[ChrisXY]

they thank you and i know this: "Well even with Integer and Floating point calculations you can still get even better performance with fine tuned hand written optimizations. "

i just want to write some basic stuff about compilers.
the people are so brain-death they think the compiler fix all there problem magic magic...

the difference between compiler in Integer+Floating vs hand written Assembler is not so big than Compiler vs SIMD units....

SIMD instructions set blow the compiler away...

But what well optimized compilers do nowadays is kind of magic.
I remember running a knapsack programming assignment written in ADA and compiled with gcc-ada on some server with Opteron 275 and on my netbook with an Atom N270. The server had Ubuntu with gcc 4.4 and my netbook Archlinux with gcc 4.5 I believe. The netbook ran it faster...

Now I'm a bit tired and I'm not very deep into compilers, but can compilers really not "abuse" those instructions and for example everytime the program needs to execute something like a=b*c+d (how often that may happens) run it via the FMA instruction?

[nepwk]

Can't say I agree there since quite the opposite happened when AMD did introduce x86-64 extensions which where quite different then anything intel was offering at the time.

x64 isn't really the same thing as SSE/AVX/FMA, etc... x64 has more to do with memory management than anything else, the other instructions are mostly aimed at improving instruction-per-clock.

Besides, that's pretty much the only time they've ever won an instruction set battle. They've also created 3Dnow!, SSE4a, SSE5(or whatever it became), etc... and they never get much traction. 64-bit x86 was inevitable, AMD just beat Intel to the punch. With anything other normal instruction set that isn't destined to happen, they're going to have a hard time getting traction within the ecosystem, considering their market share.

[deanjo]

Besides, that's pretty much the only time they've ever won an instruction set battle. They've also created 3Dnow!, SSE4a, SSE5(or whatever it became),

SSE5 is what you see in BD right now, they just made it compatible with AVX and dropped the SSE5 name.

[deanjo]

no SSE5 is FMA3... and they don't have FMA3 in the bulldozer they ad FMA4 because intel cheat to amd

now intel makes FMA3 first and amd had to ad FMA3 in the next bulldozer.

also the XOP is SSE5 and intel do not support it at all.

intel will bring FMA3 in 2013...

SSE5 according to AMD's documents is FMA4, XOP and CVT16 as of the 2009 revision of it.

http://developer.amd.com/archive/cpu/SSE5/Pages/default.aspx

linked document

http://support.amd.com/us/Embedded_TechDocs/43479.pdf