AMD Ryzen 9 9950X vs. Ryzen 9 7950X/7950X3D For Workstation Graphics

[phoronix]

Phoronix: AMD Ryzen 9 9950X vs. Ryzen 9 7950X/7950X3D For Workstation Graphics

While Windows gamers seem mixed over the AMD Ryzen 9000 series processors, for creator, scientific / HPC, code development, and many other technical computing areas I remain very impressed by the Ryzen 9000 (Zen 5) series desktop processors more than one month into constant testing with these Granite Ridge chips. One of the areas I hadn't explored until now but made me curious given the mixed messaging around gaming was how well workstation graphics workloads were performing with the new processors. For this brief weekend article is a look at the workstation graphics performance between the Ryzen 9 9950X and former Ryzen 9 7950X/7950X3D processors.

https://www.phoronix.com/review/ryzen-9950x-workstation-graphics

[oguzoztoprak]

I use paraview daily and am very happy that you cover the paraview performance of the new chips! This gen. AMD chips do look great on linux.

[ddriver]

What ruins the 3d skus is the fact that only one of the chiplets has it, but even if both had it, the interconnect would butcher most of the benefit. So those cpus only really do well in games, where the game will only use one chiplet and pretend the other doesn't exist.

Some simulation tests actually show the 6 and 8 core 3d skus totally destroying the 12 and 16 core parts, because they don't suffer the inter-chiplet synchronization penalty. Which is why they never bothered bringing a dual 3d chiplet product to the AMx socket.

What amd SHOULD DO is a 16 core chiplet with NO L3 cache on board, then slap the 3d cache on top of it. I think it is doable if they get all L3 cache off the cpu chiplet.

Or alternatively, they should design a "sea of cache" active interposer that links the chiplets.

Or anything else they can figure out to remove the additional hops.

[zamadatix]

Another featured article reporting how impressive an up to 10% gain in a certain situation is impressive? Well, at least we know Michael will continue to be seeded test gear by AMD going forward.

[jaxa]

What amd SHOULD DO is a 16 core chiplet with NO L3 cache on board, then slap the 3d cache on top of it. I think it is doable if they get all L3 cache off the cpu chiplet.

Or alternatively, they should design a "sea of cache" active interposer that links the chiplets.

Getting all L3 cache off onto its own separate chiplet on an older node could be a nice solution to the SRAM scaling problem. Add 2-3 extra cache layers for a gaming focused "X3D" version. And just as reducing L3 cache per core helped make the 16-core Zen 4c chiplet possible, getting the core count up should be easy with no L3 at all.

AMD has reused the same Zen 2 layout for Zen 3/4/5. For Zen 6 they might switch to something like "infinity Links" used in Navi 31/32. Basically the theory put forward by High Yield.

I think you would want the "sea of cache" to be L4 instead of L3. Not sure.

[V1tol]

Another featured article reporting how impressive an up to 10% gain in a certain situation is impressive? Well, at least we know Michael will continue to be seeded test gear by AMD going forward.

9950X was in bad situation here. Ubuntu LTS with its outdated kernel is not the best for the processor that came out literally yesterday. And still it managed to gain 10% in full-core workloads (probably consuming less power too). How that is not impressive? How Intel will answer on that?

[skeevy420]

9950X was in bad situation here. Ubuntu LTS with its outdated kernel is not the best for the processor that came out literally yesterday. And still it managed to gain 10% in full-core workloads (probably consuming less power too). How that is not impressive? How Intel will answer on that?

Give me fuel, give me fire
Give me that which I desire, ooh!
--̷M̷e̷t̷a̷l̷l̷i̷c̷a̷ Intel

[smbell]

It would have been really nice to see the 5950x included in these kinds of comparisons. It's still a beastly CPU and a lot of people have probably skipped the last gen.

[F.Ultra]

What ruins the 3d skus is the fact that only one of the chiplets has it, but even if both had it, the interconnect would butcher most of the benefit. So those cpus only really do well in games, where the game will only use one chiplet and pretend the other doesn't exist.

Some simulation tests actually show the 6 and 8 core 3d skus totally destroying the 12 and 16 core parts, because they don't suffer the inter-chiplet synchronization penalty. Which is why they never bothered bringing a dual 3d chiplet product to the AMx socket.

What amd SHOULD DO is a 16 core chiplet with NO L3 cache on board, then slap the 3d cache on top of it. I think it is doable if they get all L3 cache off the cpu chiplet.

Or alternatively, they should design a "sea of cache" active interposer that links the chiplets.

Or anything else they can figure out to remove the additional hops.

16 cores on a chiplet is however a very large chiplet (almost not a chiplet anymore), they have it on Epyc and that is a huge chip compared with a ryzen chip.

[blackiwid]

What amd SHOULD DO is a 16 core chiplet with NO L3 cache on board, then slap the 3d cache on top of it. I think it is doable if they get all L3 cache off the cpu chiplet.

I think something alike they will do with the 9xxx X3d, or have done because they are far over the design phase ;D. At least the big ones will get 2 3d-Caches for all cores.