AMD Preparing Linux For Smart Data Cache Injection With "Upcoming" CPUs

[phoronix]

Phoronix: AMD Preparing Linux For Smart Data Cache Injection With "Upcoming" CPUs

AMD Linux engineers are preparing the kernel for Smart Data Cache Injection (SDCI) as a feature for AMD EPYC server processors. Smart Data Cache Injection is a nifty new feature that allows for direct insertion of data from I/O devices into the CPU's L2/L3 cache...

https://www.phoronix.com/news/AMD-EPYC-SDCI-Cache-Injection

[ahrs]

In digging deeper into the AMD Linux efforts around SDCI, at least the initial drivers (SDCI users) in mind for this functionality are around Linux network drivers.

This makes sense. I know the networking stack can end up doing quite a bit of copying of data. This sounds like a big win if you can avoid all of that copying of data and put it directly into the CPUs cache.

[milkylainen]

This makes sense. I know the networking stack can end up doing quite a bit of copying of data. This sounds like a big win if you can avoid all of that copying of data and put it directly into the CPUs cache.

Sense yes. But custom pain. And nothing new.
We did this on embedded CPUs more than 10 years ago.
You _really_ have to know what you're doing.
Greedy fetching destroys performance for all.
Esp. when you're dealing with massive parallelization.

Also, Isn't this Intel calls Data Direct I/O (DDIO) on their Xeons since idk, 5 years back atleast?
Good for AMD though. It's a nice thing to have in the optimization toolbox.

[duby229]

So far I've just read the headlines, but network adapters injecting data straight to cache sounds totally safe....

[emansom]

So far I've just read the headlines, but network adapters injecting data straight to cache sounds totally safe....

As long as access is serialized or fenced, it should be fine.

.. yeah there's rowhammer-like attacks, but those all require precise timing on the host system.

So don't deploy SDCI on container/VM appliances I guess.

[sarmad]

Why is this only for Epyc processors? Sounds like something that will be useful for personal computers as well. Getting a video or a webcam stream directly into the APU cache for decoding/encoding can potentially improve performance or battery life.

[cb88]

Why is this only for Epyc processors? Sounds like something that will be useful for personal computers as well. Getting a video or a webcam stream directly into the APU cache for decoding/encoding can potentially improve performance or battery life.

Actually streaming data is exactly what you do NOT want in your cache.... its use once and done, the type of thing you would pin in cache would be things that you know are going to be cache hits millions of times or more.

A direct example of this is the fact that the Tempest engine accelerator on PS5 is basically a CU with some extra stuff and the cache stripped off.

[schmidtbag]

I would hope this is a disabled-by-default feature because it sounds like a security issue waiting to happen.

[sophisticles]

I echo the security concerns; it sounds like the perfect feature to allow Michael to write a bunch of articles about newly discovered security vulnerabilities in new AMD CPUs.

[coder]

Also, Isn't this Intel calls Data Direct I/O (DDIO) on their Xeons since idk, 5 years back atleast?

This.

The first platform to have DDIO was actually Sandybridge-E (circa 2012). I remember reading about it, before I bought mine.