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With AMD Zen 4, It's Surprisingly Not Worthwhile Disabling CPU Security Mitigations

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  • #61
    Originally posted by yump View Post

    I am using Firefox and I see the chart. Do you have content or scripts from openbenchmarking.org blocked? AFACT, the chart is an SVG, hosted on openbenchmarking.org, dynamically inserted into the page by a script, also hosted on openbenchmarking.org.
    Works fine for me too. Charts are noticeably larger in Chrome than in Firefox, but otherwise show the same info.

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    • #62
      Originally posted by yump View Post
      I am using Firefox and I see the chart. Do you have content or scripts from openbenchmarking.org blocked?
      No, pretty much the only sites I block are facebook & twitter, but only on one of the PCs I tried (the other I don't typically use for web browsing). Anyway, it's working for me now!


      Originally posted by yump View Post
      AFACT, the chart is an SVG, hosted on openbenchmarking.org, dynamically inserted into the page by a script, also hosted on openbenchmarking.org.
      I think that's how it usually works. This is the first time I can remember seeing a page get truncated like this.

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      • #63
        Originally posted by Developer12 View Post

        Designers will always look for more hardware optimizations. It's the ONE AND ONLY reason computers have continued to get faster, even as software becomes more bloated.

        Speculation is one of the most powerful hardware optimizations ever invented, allowing parallel processing to improve serial execution speed. It's perfectly fine to speculate on *most* branches, but you need to A) mark the security-critical ones for exclusion and B) flush them on context switch. The hardware NEEDS to be told when those two things are happening.

        Once it *is* being told, then it's perfectly possible to design optimizations that take it into account. For example, being told you are moving from one context to another on the downside forces you to flush old predictions that would have leaked data (resetting predictions to random chance), but on the upside allows you to flush old predictions that would tell you the wrong thing in the new situation.
        Thanks a lot for all this! I appreciate learning more.
        Since speculation happens in parallel (I assumed it'd be serial) does that mean there's more than 1 speculation done if the hardware is available?

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        • #64
          Originally posted by geearf View Post

          Thanks a lot for all this! I appreciate learning more.
          Since speculation happens in parallel (I assumed it'd be serial) does that mean there's more than 1 speculation done if the hardware is available?
          Yes, the CPU will keep executing as long the operands is available in registers and the unit for corresponding computation is available (integer and float point are in different units and there are multiple of int/float processing units).

          Sometimes it would even guess the result of a "if" and execute the corresponding branch.
          If the guess is wrong, that branch is discarded.

          And that is meltdown.

          Even with the branch discarded, some memory region is still accessed and bring into the cache.
          By measuring the time required to access certain memory region, the hackers can use that to do some fancy thing using that information.

          I'm not very familiar with the detailed exploit though, so I'm going to stop here.

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          • #65
            Originally posted by NobodyXu View Post

            Yes, the CPU will keep executing as long the operands is available in registers and the unit for corresponding computation is available (integer and float point are in different units and there are multiple of int/float processing units).

            Sometimes it would even guess the result of a "if" and execute the corresponding branch.
            If the guess is wrong, that branch is discarded.

            And that is meltdown.

            Even with the branch discarded, some memory region is still accessed and bring into the cache.
            By measuring the time required to access certain memory region, the hackers can use that to do some fancy thing using that information.

            I'm not very familiar with the detailed exploit though, so I'm going to stop here.
            I see, thank you for the explanation, it makes me want to research this subject more.

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            • #66
              Originally posted by geearf View Post

              Thanks a lot for all this! I appreciate learning more.
              Since speculation happens in parallel (I assumed it'd be serial) does that mean there's more than 1 speculation done if the hardware is available?
              Sure. How many branches do you think you might encounter if you looked 50 or 100 instructions ahead? The other way to look at it, is look how many parallel integer and floating point engines modern CPU cores have.

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              • #67
                Originally posted by Developer12 View Post

                Sure. How many branches do you think you might encounter if you looked 50 or 100 instructions ahead? The other way to look at it, is look how many parallel integer and floating point engines modern CPU cores have.
                You can look that far ahead? Wow!

                Thank you!

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                • #68
                  Originally posted by geearf View Post

                  You can look that far ahead? Wow!

                  Thank you!
                  You will be in for a suprise: https://www.anandtech.com/show/17585...the-high-end/8

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                  • #69
                    Originally posted by Anux View Post
                    Sorry with my limited knowledge on this I don't see what you're pointing to. I see there are improvements to prediction but I don't really understand it.

                    Thank you!

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                    • #70
                      Originally posted by geearf View Post

                      Sorry with my limited knowledge on this I don't see what you're pointing to. I see there are improvements to prediction but I don't really understand it.

                      Thank you!
                      AMD has increased the L1 Branch Target Buffer (BTB) cache size by 50%, to 2 x 1.5k entries. And similarly, the L2 BTB has been increased to 2 x 7k entries
                      We are already looking ahead over 10000 µOPs.

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