AMD Announces Ryzen 7000 Series "Zen 4" Desktop CPUs - Linux Benchmarks To Come

[jaxa]

I would have thought the 7600X would be a 65W part. That does surprise me.

You can run it just like a 65W part. You only lose performance and pay more. The price is where the complaints are.

What AMD has done here is fair. Most mainstream users can figure how to cool a 105W TDP, and anybody who is bothering with expensive 12-16 cores can use a better cooler. If you mess it up, the CPU will protect itself by not clocking as high as it can. And you can take any of these chips and throttle them down to a lower TDP like 35W or 65W. That should be a one click process in Windows with Ryzen Master, or something else on Linux.

AMD will offer four (!) chipsets for AM5. Looks like they are not averse to copying Intel as soon as they find themselves king of the hill.

X670 uses two identical chips, B650 uses only one of them. Then the Extreme versions are the same but you get a guarantee of PCIe 5.0 for both graphics and storage on the motherboard.

The A620 that was rumored to come next year might be different, IDK.

[numacross]

You can run it just like a 65W part. You only lose performance and pay more. The price is where the complaints are.

What AMD has done here is fair. Most mainstream users can figure how to cool a 105W TDP, and anybody who is bothering with expensive 12-16 cores can use a better cooler. If you mess it up, the CPU will protect itself by not clocking as high as it can. And you can take any of these chips and throttle them down to a lower TDP like 35W or 65W. That should be a one click process in Windows with Ryzen Master, or something else on Linux.

Exactly, it can be set in BIOS in a OS-independent way as well.

AMD has even made a PR slide for this feature noting that Zen 4 should be more efficient at lower TDP limits:
Ryzen 7000 Tech Day - Keynote 29.jpg

[Dukenukemx]

The beginning of the end of Apple silicon. When x86 goes 5nm, it go Brrrrrr.

[coder]

Does Alder/Raptor Lake even support dedicated ECC? I was under the impression that mainstream Intel parts (excluding some Celeron/Pentium/i3) do not support it. DDR5 has in-chip ECC, but that's a different beast.

As Birdie mentioned, ECC is supported with the entire range of Alder Lake, if you simply use a motherboard with the W680 chipset. This is an unprecedented move*, for Intel. I think the last time they did such a thing was on Socket 775 boards, back in the Core 2 era, prior to the memory controller being integrated into the CPU.

It's an open question whether they did it simply to counter Ryzen's level of ECC-support, or whether it's because they lacked the resources to do a separate Xeon E-series launch for the Alder Lake generation.

As such, we have no visibility into whether the same will be true of Raptor Lake, or if that will indeed limit ECC support to a rebranded Xeon E-series version.

* Intel has traditionally enabled ECC support on select models of mainstream desktop CPUs, including most i3's. Unfortunately, Intel motherboards featuring ECC support typically cost a few times as much as an i3 CPU, itself.

[coder]

They do not limit ECC, which was the crux of my comment.

On the G-series they do. To get ECC on a G-series APU, you must use the Pro version which aren't available via retail channels. I hope they don't continue this practice for the 7000-series*.

* Although all 7000-series Ryzens will have an integrated GPU, AMD still plans to have a separate G-series for those who want a "serious" iGPU. The rest will get only a 2 CU RDNA 2, which I think is the smallest iGPU they've ever offered.

[numacross]

As Birdie mentioned, ECC is supported with the entire range of Alder Lake, if you simply use a motherboard with the W680 chipset. This is an unprecedented move*, for Intel. I think the last time they did such a thing was on Socket 775 boards, back in the Core 2 era, prior to the memory controller being integrated into the CPU.

It's an open question whether they did it simply to counter Ryzen's level of ECC-support, or whether it's because they lacked the resources to do a separate Xeon E-series launch for the Alder Lake generation.

As such, we have no visibility into whether the same will be true of Raptor Lake, or if that will indeed limit ECC support to a rebranded Xeon E-series version.

* Intel has traditionally enabled ECC support on select models of mainstream desktop CPUs, including most i3's. Unfortunately, Intel motherboards featuring ECC support typically cost a few times as much as an i3 CPU, itself.

The Xeon angle would be my pick, but you're right that we can make assumptions here.

On the G-series they do. To get ECC on a G-series APU, you must use the Pro version which aren't available via retail channels. I hope they don't continue this practice for the 7000-series*.

* Although all 7000-series Ryzens will have an integrated GPU, AMD still plans to have a separate G-series for those who want a "serious" iGPU. The rest will get only a 2 CU RDNA 2, which I think is the smallest iGPU they've ever offered.

I stand corrected then, didn't know about this limitation.

[coder]

The beginning of the end of Apple silicon. When x86 goes 5nm, it go Brrrrrr.

All of the Apple Mac chips we've seen so far are laptop-oriented. We still have yet to see their ARM-based successor to the Mac Pro.

Also, they haven't yet moved beyond the Firestorm core, which first launched in the A14 phone SoC, about 2 years ago.

In other words, I wouldn't count them out, on the performance front. And I'm pretty sure they still beat Zen 4 in perf/W.

[ms178]

I'm excited that AMD is actually pushing AVX-512 on regular desktops even if it's not a full-width core. Finally a reason to upgrade from Haswell!

As I am on a cheap 18-Core Haswell-EP right now, that was along my thinking, too. I still curse Intel for not allowing AVX-512 on Alder Lake. But let's wait which important instructions AMD left out, AVX-512 is quite a mess due to the amount of sub-ISAs. I probably can wait for a proper AVX-512 implementation in Zen 5 if my current setup doesn't brake.

[coder]

let's wait which important instructions AMD left out, AVX-512 is quite a mess due to the amount of sub-ISAs.

This says Zen 4 will support everything Rocket Lake implements + BF16.

https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512

Zen 5 will probably increase throughput and decrease latency, if it avoids breaking each instruction into two 256-bit chunks.

[numacross]

This says Zen 4 will support everything Rocket Lake implements + BF16.

https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512

Zen 5 will probably increase throughput and decrease latency, if it avoids breaking each instruction into two 256-bit chunks.

I was about to post this, but it's a claim without a source. I was not able to find anything useful on AMD's official site, it's probably still under NDA.
Do we know for sure Zen 4's AVX-512 is using the 2x256 method?