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AMD @ Computex 2022 Talks Up Ryzen 7000 Series, Announces Mendocino Budget Laptop APUs

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  • #11
    Originally posted by Slartifartblast View Post
    Interesting, I wonder if the desktop 7000 series will feature a reasonable amount of CUs for the IGP as there was a rather wide disappointing disparity in the 6000 mobile series of either 6 or 12 CUs. DDR5 memory is still painfully expensive though.
    Your expectation should be 4 CUs. Nothing special, but sufficient for older games. I assume it will be better than the 16/24/32 EUs on Alder Lake desktop CPUs.

    It would be funny if harvesting all the usable parts from an OEM PC was cheaper than paying extra for DDR5, but we are only looking at +$100 for 32 GB DDR5, I think. It's a cost that can be tolerated if you want to be an early adopter.

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    • #12
      I am wondering if there is any plans for a beefier APUs, where single compute chiplet is replaced with GPU chiplet?
      Limiting CPU to 8C/16T, but still enough.

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      • #13
        Hm, 15% single core of which 12% is accountable to the frequency jump (4,9 to 5,5 GHz) leaving 3% per clock improvments. That is either played low or really bad, it would make zen 4 lose to zen 3D in some cases. Having 170W TDP limit also isn't flying with me.
        Didn't they do anything besides porting zen 3 to 5nm and doubling the L2?

        Originally posted by Drago View Post
        I am wondering if there is any plans for a beefier APUs, where single compute chiplet is replaced with GPU chiplet?
        Limiting CPU to 8C/16T, but still enough.
        I would bet that they try to merge notebook APUs and desktop CPUs (having only half the development effort) and such a GPU chiplet would be the logical thing in that path. RDNA 3 will allready be a chiplet approach in the high end and that is also the reason I don't belive it will happen with zen 4, the chiplet way seems not yet suitable for low power designs.

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        • #14
          Originally posted by ddriver View Post

          IGPU is on the IO die, where also the PCIE controller resides. So it has a very fast pathway to use the iGPU for say video decoding and dma the output to a discrete gpu. There will be your usual bios toggles, but I expect it to be automatic - it either detects a gpu on the slot market as "first" or primary, or falls back to the igpu. I don't expect that anyone would want to disable the igpu even with a discrete gpu, because it will likely contain accelerator circuitry that even if nowhere nearly as "fast" as a fat gpu, will have unparalleled latency as it basically resides on the hardware system agent level. That's amd's whole argumentation in favor of making the tiny igpu "a guarantee" across its entire product range, well that and counting each those as a gpu unit to improve its overall graphics market share, in which intel's been eclipsing both amd and nvidia due to having igpus in every consumer cpu.
          This is very interesting. As someone who is interested in GPU passthrough I was hoping Intel Arc GPUs would support GVT-g so that the GPU could be used for both the main system and the virtualized system. However if AMD is including tiny GPUs in all of their lineups that may make SR-IOV a moot point. I'm curious what others think

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          • #15
            Will new CPUs have 3D cache?

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            • #16
              Originally posted by Anux View Post
              Hm, 15% single core of which 12% is accountable to the frequency jump (4,9 to 5,5 GHz) leaving 3% per clock improvments. That is either played low or really bad, it would make zen 4 lose to zen 3D in some cases. Having 170W TDP limit also isn't flying with me.
              Didn't they do anything besides porting zen 3 to 5nm and doubling the L2?
              That caught my eye as well. Another thing that came to mind was that how much of that uplift was from using DDR5 RAM. Then again high end CPU design is a game of increasingly diminishing returns where you model what would have the biggest impact and go with those things first and are are left with increasingly less effective additions/improvements as time goes on. Eventually you then have to do a big clean sheet "reset" that takes years and is very expensive to be able to continue making any real headway.

              I suspect they're comparing against the "3D" parts that were meant to be an in-house technology demonstrator/test parts, but got so much attention they had to make them into real products. Based on what they showed the initial Zen4 parts aren't going to have it, but they will be extensively compared to them and hence would/will face a lot of criticism if it's just compared to the regular Ryzen 5000-series.
              "Why should I want to make anything up? Life's bad enough as it is without wanting to invent any more of it."

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              • #17
                Originally posted by agurenko View Post

                No, I got that But if you're also using external GPU what's the tool to control which GPU is used?
                If external GPU means discrete GPU
                Captura de tela de 2022-05-23 13-54-59.png
                The first one is integrated on cpu, the second is a discrete PCI express GPU.
                https://wiki.archlinux.org/title/PRIME

                The same can be made with command line property of steam games.
                This led me to reduce idle power consumption from 60 w to 40. I just use the discrete gpu for playing games or other tasks that makes sense.

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                • #18
                  Originally posted by heliosh View Post
                  They say (at 23:46 in the presentation) that AM5 supports WiFi6E.
                  Is that in the Chipset? Or a dedicated WiFi chip on the mainboard? Anything in the kernel yet?
                  That is probably the AMD RZ600 series chip which is made in cooperation with MediaTek, also found on some socket AM4 mobos with onboard wifi. They are supported by mainline Linux with mt7921e driver I believe.

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                  • #19
                    Looks like the Zen architecture is finally hitting its limitations. Intel’s Raptor Lake is going to be released with another 15% single threaded IPC increase over Alder Lake along with a 40% increase in multi-core performance. It’s insane how Intel was on 14nm for 6 years and AMD was only able to beat them for one generation due to TSMC’s 7nm process.

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                    • #20
                      Originally posted by Drago View Post
                      I am wondering if there is any plans for a beefier APUs, where single compute chiplet is replaced with GPU chiplet?
                      Limiting CPU to 8C/16T, but still enough.
                      Raphael (and by extension, Dragon Range for laptops) will have weak graphics located in the I/O die, not a primary chiplet. They don't seem to have such plans yet, although maybe they will make a version for server/HPC eventually.

                      Intel on the other hand does seem to be going that route, for example by putting a Battlemage graphics tile into Meteor Lake. Presumably this tile would be shared with discrete GPUs that have 1-4 of them.

                      Originally posted by Anux View Post
                      Hm, 15% single core of which 12% is accountable to the frequency jump (4,9 to 5,5 GHz) leaving 3% per clock improvments. That is either played low or really bad, it would make zen 4 lose to zen 3D in some cases. Having 170W TDP limit also isn't flying with me.
                      Didn't they do anything besides porting zen 3 to 5nm and doubling the L2?
                      A lot of people on other forums are melting down over this right now.

                      https://wccftech.com/amd-greater-tha...nother-jebait/

                      The fine print on the slides could lead you to believe that they are deliberately underestimating the IPC/performance of Zen 4. Doesn't seem like a good strategy to me, but we'll find out the truth eventually the right way: by reading third-party reviews instead of leaks and marketing claims.

                      Originally posted by shmerl View Post
                      Will new CPUs have 3D cache?
                      Not at launch. You probably have to wait until 2023 to see a 3D cache model. Hopefully they will put it on at least the 16-core as well as the 8-core this time.

                      Originally posted by WannaBeOCer View Post
                      Looks like the Zen architecture is finally hitting its limitations. Intel’s Raptor Lake is going to be released with another 15% single threaded IPC increase over Alder Lake along with a 40% increase in multi-core performance. It’s insane how Intel was on 14nm for 6 years and AMD was only able to beat them for one generation due to TSMC’s 7nm process.
                      That sounds overly optimistic for Raptor Lake's single-threaded gains. It will probably have a similar bump to this (IPC + clocks = 10-15%), and it will be adding another 8 small cores, but only in the Core i9. But as it stands, that's more than enough to defeat Zen 4. We'll see if that changes in a few months.

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