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MIPS Claims "Best-In-Class Performance" With New RISC-V eVocore CPUs

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  • tuxd3v
    replied
    woow,
    Those guys were silent all this time, and they have being very busy, like gnomes in a cave extracting.. "the precious metal".
    That's talking, SMT2 for P series and SMT4 for I series, fantastic.
    Now there are a lot of metrics that we don't know, like frequency, cache sizes and a lot of other aspects.

    I would love to see more about their interrupt controller(256 interrupts)
    I don't know if APLIC/CLINT can compete for example with ARM NVIC, I believe it can't.. sadly.

    Hope they have some hardware soon

    Leave a comment:


  • artivision
    replied
    Originally posted by PerformanceExpert View Post

    It says 8 fetch, so possibly 8 decode too. Generally you have 1.5-2x as many execution ports than decoders. But width doesn't say much about performance.

    There are some very odd design choices here: there is a shared L2 cache and SMT, but no mention of L3 or SIMD extension. A cluster only has about 64 GB/s bandwidth shared between 8 cores. All this tells me this won't be a high performance design, certainly not something suitable for a many-core server. It may well beat current RISC-V cores, but that's a pretty low bar.
    Says 8 fetch / 8 wide exec specifically. This is 8 exec ports and probably 4 decode. That doesn't say is watts per core / frequency.

    Leave a comment:


  • bachchain
    replied
    MIPS hardware, now MIPS-free!

    Leave a comment:


  • igxqrrl
    replied
    Originally posted by splitcells.net View Post

    There is something very close to that at least: sub-$200:
    https://shop.allnetchina.cn/collecti...board-computer
    Thanks! This is the right direction. As an old fogie, it's in impulse purchase territory for me. Probably a little pricey for many, and of course the price precludes the usual "Hey, I'll use this for a k8 cluster!" crowd, but this is the closest I've seen. Thanks for the pointer!

    Leave a comment:


  • splitcells.net
    replied
    PS: https://www.youtube.com/watch?v=4PoWAsBOsFs

    Leave a comment:


  • splitcells.net
    replied
    Originally posted by igxqrrl View Post
    RISC-V desperately needs a sub-$100 SBC that can capture some mind-share. It needn't be fast, but it needs to run Linux. The hobbyist market right now is completely ceded to the Raspberry Pi.
    There is something very close to that at least: sub-$200:

    Leave a comment:


  • igxqrrl
    replied
    Originally posted by brucehoult View Post

    Is $16.90 good enough for you for a "compute module" kind of board (different connector than Pi)?



    Or $20.90 bundled with a $5 expansion board, $23.90 with WIFI:



    Or $29 for one with the same SoC but on a Pi CM3 compatible board:

    The ClockworkPi Core R-01 is a single-core 64-bit RISC-V module with limited performance, it does not include GPU acceleration.However, the RISC-V ecosystem is growing fast. We are pleased to be able to provide you with the latest, usable, low-cost RISC-V compute module, build the most direct connection to the RISC-V community for you. Please note: ClockworkPi Core R-01 is a highly experimental model and requires some experience with Linux system & FOSS. We strongly recommend all beginners to choose other models. What is RISC-VRISC-V is an open standard instruction set architecture (ISA) that began in 2010 and is based on established reduced instruction set computer (RISC) principles. RISC-V is provided under open source licenses. Learn more at RISCV.org Tech Specs RISC-V Single-core RV64IMAFDCVU @ 1.0GHz (maximum frequency) No GPU (software rendering only) 1GB DDR3 memory The 200pin SODIMM interface is compatible with CPI v3.14 mainboard Size: 67x30mm DocumentationD1 Datasheet: https://github.com/clockworkpi/DevTerm/blob/main/D1_Datasheet_V0.1_Draft_Version.pdfD1 User Manual: https://github.com/clockworkpi/DevTerm/blob/main/D1_User_Manual_V0.1_Draft_Version.zipD1 wiki: https://linux-sunxi.org/D1 Shipping information Express service Based on the current supply chain and logistics situation, the estimated delivery time is approximately 60 business days.


    This SoC is roughly Pi Zero class. Runs Linux, with 512 MB or 1 GB RAM depending on exactly which of the above boards you get. Not fast but you said that's OK.
    These kinda prove my point.

    IMO these are SBC and Linux compatible in name only. Your average CS student, or average hobbyist, is not going to be able to use these. Forums abound with people spending hours or days trying to get Linux running.

    There are companies (e.g. SiFive) who have the resources that they could help streamline this process. But aside from the long-delayed Risc-V hand thingy, they too haven't had much interest in this market.

    Before Raspberry pi there were arm boards that could run Linux for hobbyists, but not until the rpi foundation did the product get traction. Why? Because they had a stable linux installation, a robust and easy installation process, and a product where, for $25 (or whatever), you could have a usable ARM SOC. None of the items above seem to fit that bill.

    Leave a comment:


  • PerformanceExpert
    replied
    Originally posted by artivision View Post

    It refers to Risk-V processors with 8 out of order execution ports. Plenty of x86 cores are at that level, the latest Intel core have 12 e-ports.
    It says 8 fetch, so possibly 8 decode too. Generally you have 1.5-2x as many execution ports than decoders. But width doesn't say much about performance.

    There are some very odd design choices here: there is a shared L2 cache and SMT, but no mention of L3 or SIMD extension. A cluster only has about 64 GB/s bandwidth shared between 8 cores. All this tells me this won't be a high performance design, certainly not something suitable for a many-core server. It may well beat current RISC-V cores, but that's a pretty low bar.

    Leave a comment:


  • brucehoult
    replied
    Originally posted by igxqrrl View Post
    RISC-V desperately needs a sub-$100 SBC that can capture some mind-share. It needn't be fast, but it needs to run Linux. The hobbyist market right now is completely ceded to the Raspberry Pi.
    Is $16.90 good enough for you for a "compute module" kind of board (different connector than Pi)?



    Or $20.90 bundled with a $5 expansion board, $23.90 with WIFI:



    Or $29 for one with the same SoC but on a Pi CM3 compatible board:

    The ClockworkPi Core R-01 is a single-core 64-bit RISC-V module with limited performance, it does not include GPU acceleration.However, the RISC-V ecosystem is growing fast. We are pleased to be able to provide you with the latest, usable, low-cost RISC-V compute module, build the most direct connection to the RISC-V community for you. Please note: ClockworkPi Core R-01 is a highly experimental model and requires some experience with Linux system & FOSS. We strongly recommend all beginners to choose other models. What is RISC-VRISC-V is an open standard instruction set architecture (ISA) that began in 2010 and is based on established reduced instruction set computer (RISC) principles. RISC-V is provided under open source licenses. Learn more at RISCV.org Tech Specs RISC-V Single-core RV64IMAFDCVU @ 1.0GHz (maximum frequency) No GPU (software rendering only) 1GB DDR3 memory The 200pin SODIMM interface is compatible with CPI v3.14 mainboard Size: 67x30mm DocumentationD1 Datasheet: https://github.com/clockworkpi/DevTerm/blob/main/D1_Datasheet_V0.1_Draft_Version.pdfD1 User Manual: https://github.com/clockworkpi/DevTerm/blob/main/D1_User_Manual_V0.1_Draft_Version.zipD1 wiki: https://linux-sunxi.org/D1 Shipping information Express service Based on the current supply chain and logistics situation, the estimated delivery time is approximately 60 business days.


    This SoC is roughly Pi Zero class. Runs Linux, with 512 MB or 1 GB RAM depending on exactly which of the above boards you get. Not fast but you said that's OK.

    Leave a comment:


  • artivision
    replied
    Originally posted by ryao View Post
    It occurs to me that it should be easy to have "Best-In-Class Performance" when they are the only one in that class.
    It refers to Risk-V processors with 8 out of order execution ports. Plenty of x86 cores are at that level, the latest Intel core have 12 e-ports.

    Leave a comment:

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