MIPS Claims "Best-In-Class Performance" With New RISC-V eVocore CPUs

[phoronix]

Phoronix: MIPS Claims "Best-In-Class Performance" With New RISC-V eVocore CPUs

MIPS Tech is no longer working on their MIPS CPU instruction set architecture but has been taking on RISC-V based designs. Today the company made the bold announcement for their new eVocore P8700 and I8500 multiprocessor IP cores that they offer "Best-In-Class Performance and Scalability."..

https://www.phoronix.com/scan.php?pa...ISC-V-May-2022

[Danielsan]

This looks to be a big game changer for the Risc-V adoption, nice!

[willmore]

Who owns MIPS these days? Does anyone trust them enough to do business with them?

[igxqrrl]

RISC-V desperately needs a sub-$100 SBC that can capture some mind-share. It needn't be fast, but it needs to run Linux. The hobbyist market right now is completely ceded to the Raspberry Pi.

[willmore]

RISC-V desperately needs a sub-$100 SBC that can capture some mind-share. It needn't be fast, but it needs to run Linux. The hobbyist market right now is completely ceded to the Raspberry Pi.

At this point, I'd settle for *any* sub $100 SBC.

[lyamc]

Who owns MIPS these days? Does anyone trust them enough to do business with them?

People do business with Oracle, Apple and Nvidia and they're the worst, so...

[ryao]

It occurs to me that it should be easy to have "Best-In-Class Performance" when they are the only one in that class.

[artivision]

It occurs to me that it should be easy to have "Best-In-Class Performance" when they are the only one in that class.

It refers to Risk-V processors with 8 out of order execution ports. Plenty of x86 cores are at that level, the latest Intel core have 12 e-ports.

[brucehoult]

RISC-V desperately needs a sub-$100 SBC that can capture some mind-share. It needn't be fast, but it needs to run Linux. The hobbyist market right now is completely ceded to the Raspberry Pi.

Is $16.90 good enough for you for a "compute module" kind of board (different connector than Pi)?

https://www.aliexpress.com/item/1005003594875290.html

Or $20.90 bundled with a $5 expansion board, $23.90 with WIFI:

https://www.aliexpress.com/item/1005003741287162.html

Or $29 for one with the same SoC but on a Pi CM3 compatible board:

https://www.clockworkpi.com/product-...rkpi-core-r-01

This SoC is roughly Pi Zero class. Runs Linux, with 512 MB or 1 GB RAM depending on exactly which of the above boards you get. Not fast but you said that's OK.

[PerformanceExpert]

It refers to Risk-V processors with 8 out of order execution ports. Plenty of x86 cores are at that level, the latest Intel core have 12 e-ports.

It says 8 fetch, so possibly 8 decode too. Generally you have 1.5-2x as many execution ports than decoders. But width doesn't say much about performance.

There are some very odd design choices here: there is a shared L2 cache and SMT, but no mention of L3 or SIMD extension. A cluster only has about 64 GB/s bandwidth shared between 8 cores. All this tells me this won't be a high performance design, certainly not something suitable for a many-core server. It may well beat current RISC-V cores, but that's a pretty low bar.