Announcement

Collapse
No announcement yet.

AMD Ryzen 7 5800X3D Continues Showing Much Potential For 3D V-Cache In Technical Computing

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • #11
    Originally posted by V1tol View Post
    These tests illustrate a enormous mistake Intel and AMD did by not making 3- or 4-channel memory controller in these processors. 177% performance improvement in Zstd just by adding some cache and even lowering CPU clocks. Maybe not a big deal but compression/decompression speed is very important nowadays - everything from http to zswap is compressed by different algorithms.
    Or maybe a huge L3 cache costs quite a lot of money and could also result in a lot lower yields, so AMD/Intel engineers aren't stupid, they are just constrained. Also, remember Broadwell. Intel executed this feat many years ago.

    If the 3D cache was just a walk in the park, why would AMD only release the only consumer SKU with it?

    Also, from what I've heard consumer Zen 4 CPUs will not include it as well.

    Comment


    • #12
      Originally posted by skeevy420 View Post
      So does anyone know if the 5800X3D is going to be the best & last processor for the AM4 platform in regards to overall desktop usage? Will the 5700G be the best AM4 desktop APU?
      It is the last CPU for the AM4 platform. Define "the best" please. It's faster in some tasks but lots of people don't even need that level of performance in the first place and would be happy with something like Ryzen 5500 which costs just $160. 5800X3D on average won't be three times faster.

      And God forbid we remember that Intel still exists and offers excellent CPUs like Core i3 12100 which costs just $122 and has a built-in GPU which can only be found on much more expensive AMD APUs like 5600G and 5700G.

      Comment


      • #13
        Originally posted by V1tol View Post
        These tests illustrate a enormous mistake Intel and AMD did by not making 3- or 4-channel memory controller in these processors. 177% performance improvement in Zstd just by adding some cache and even lowering CPU clocks. Maybe not a big deal but compression/decompression speed is very important nowadays - everything from http to zswap is compressed by different algorithms.
        Half yes half no.

        Triple/Quad channel controllers help you with bandwidth so triple/quad channel memory controller could help you a lot with something like LZ4, that gets no performance bump from 3d cache. It also to spread more workload evenly to more sticks.

        However, triple/quad channel won't remove bottleneck of latency. Think from this perspective, if you can clock memory to same speed/timings on triple/quad channel as dual channel that is at best 50/100% performance increase. And in fact, that is most optimistic performance increase you can get. Meanwhile in ZSTD you have 177% performance increase.

        Comment


        • #14
          Originally posted by geearf View Post

          What do you mean by that?
          Power limitations of the socket.

          Last edited by vsteel; 02 May 2022, 04:02 PM.

          Comment


          • #15
            Originally posted by piotrj3 View Post
            However, triple/quad channel won't remove bottleneck of latency. Think from this perspective, if you can clock memory to same speed/timings on triple/quad channel as dual channel that is at best 50/100% performance increase. And in fact, that is most optimistic performance increase you can get. Meanwhile in ZSTD you have 177% performance increase.
            I've considered this issue, but it depends on your workload. I was thinking that maybe for command rates configured to T2, the pairs of channels could maybe even work asynchronously to reduce latency. I imagine that is very complicated, and could potentially interfere with threads that need more RAM than what a pair of channels has to offer.
            In any case, more channels can improve performance for a minimal increase in cost. Bigger caches in a lot of cases cost a lot and sometimes yield no benefit.

            Originally posted by atomsymbol
            I am not sure that it would be cheaper. Having 4 64-bit DDR4 channels on AM4 by default might increase cost of all AM4 mainboards by 10€ or more. Two DDR5 modules in dual-channel configuration have 4 32-bit channels, in order for DDR5 wiring (number of pins) not to increase the cost of AM5 motherboards.
            That's assuming all boards include all 4 channels. I'm sure most ITX boards would either stick with 2 slots, or go with SO-DIMMs. Budget boards won't need 4 channels. I think paying 10 extra is well worth the performance gains, when you consider the cache costs a hell of a lot more than that.

            Comment


            • #16
              Originally posted by birdie View Post
              And God forbid we remember that Intel still exists and offers excellent CPUs like Core i3 12100 which costs just $122 and has a built-in GPU which can only be found on much more expensive AMD APUs like 5600G and 5700G.
              Intel has made some great CPUs, I wouldn't call Alder Lake great. It is rather twitchy. I would wait for the next revision of the CPUs before I jumped over to Intel. Just like I am going to wait with the next AMD release and see how it shakes out.

              DDR5 should be sorted out more in the fall, it is still new and starting its long life. PCIE5 is new but should be better sorted out in a few months. For AMD they will have a new socket and the high end motherboard chipset versions are supposed to have 2 chips like the old North and South bridges, we will see how they play together.




              Comment


              • #17
                Originally posted by atomsymbol

                Well, but you didn't account for the cost of increasing the number of pins on the CPU which would be required by a quad-channel AM4 socket (all AM4 motherboards, all AM4 CPUs).
                Also an increase in die size for the extra memory PHYs and data fabric routing and reworked packaging. AMD does make a quad memory channel CPU, it's called Threadripper. If you want to look at cost, using the Threadripper socket and package is probably the least costly because it already exists.

                Comment


                • #18
                  Originally posted by birdie View Post

                  Or maybe a huge L3 cache costs quite a lot of money and could also result in a lot lower yields, so AMD/Intel engineers aren't stupid, they are just constrained. Also, remember Broadwell. Intel executed this feat many years ago.

                  If the 3D cache was just a walk in the park, why would AMD only release the only consumer SKU with it?

                  Also, from what I've heard consumer Zen 4 CPUs will not include it as well.
                  I think they said they want all possible cache dies for their next gpu release. There is no room to get them on current generation.

                  Comment


                  • #19
                    Originally posted by atomsymbol
                    Well, but you didn't account for the cost of increasing the number of pins on the CPU which would be required by a quad-channel AM4 socket (all AM4 motherboards, all AM4 CPUs).

                    ----

                    I don't know the purpose of the 387 extra pins on the AM5 socket (1718 pins) compared to AM4 (1331 pins), considering that AM5 is rumoured to support DDR5 only (no support for DDR4).
                    As far as I'm aware, AM5 is DDR5-only, and, I think is supposed to be dual channel. I assume most of the pins are for extra PCIe lanes (likely delivered directly from the CPU rather than the chipset), more power delivery, more pins for whatever the iGPU needs, and I assume DDR5 itself needs more pins. So, 387 sounds reasonable for those kinds of upgrades.
                    I don't think the pins for 2 extra channels would make that big of a difference in socket cost; they would cost less than V-cache, anyway. Bear in mind that for first-gen Threadrippers, those sockets were huge and nearly half of the socket was rendered useless. When looking at this diagram, I assume the dark blue pins and some of the pink ones are for RAM:
                    A. B. 1. 4. 5. 6. 7. 8. 9. 10. 11. VSS. DP0_TXN[2]. RSVD. VSS. DP2_TXP[1]. VSS. DP2_AUXP. DP0_TXN[1]. F. G. H. I. J. K. L. M. N. O. VSS. P_GFX_TXP[0]. P_GFX_TXN[0 ]. VSS. P_GFX_TXP[3]. P_GFX_TXN[3 ]. VSS. P_GFX_TXP[6]. P_GFX_TXN[6 ]. VSS. P_GFX_TXP[9]. P_GFX_TXN[9 ]. VSS. 13. TEST11. 14. DP2_TXP[0]. ...

                    Collectively, those seem to take up about 1/4 of the package. So, maybe about 150 pins per RAM slot. That's a lot, but nothing too crazy, and roughly half of that is I think just power delivery.

                    In any case, triple or quad channel is unlikely to happen for AM5. Even if you ignore the CPU, the iGPU could really use the bandwidth.

                    Comment


                    • #20
                      Originally posted by piotrj3 View Post

                      Half yes half no.

                      Triple/Quad channel controllers help you with bandwidth so triple/quad channel memory controller could help you a lot with something like LZ4, that gets no performance bump from 3d cache. It also to spread more workload evenly to more sticks.

                      However, triple/quad channel won't remove bottleneck of latency. Think from this perspective, if you can clock memory to same speed/timings on triple/quad channel as dual channel that is at best 50/100% performance increase. And in fact, that is most optimistic performance increase you can get. Meanwhile in ZSTD you have 177% performance increase.
                      Two things:
                      LZ4 like core speed. It's not much bound by main memory BW nor L3 BW. So, L1 and IPC make LZ4 happy.

                      Triple/quad channel will lower *average* latency, but not pointer chasing single threaded latency. I'm not aware of a benchmark that really can tell the difference.

                      Comment

                      Working...
                      X