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Linux 5.17 RISC-V Allows Rebooting Without Needing Special Driver, HiFive Unmatched Improvements

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  • Linux 5.17 RISC-V Allows Rebooting Without Needing Special Driver, HiFive Unmatched Improvements

    Phoronix: Linux 5.17 RISC-V Allows Rebooting Without Needing Special Driver, HiFive Unmatched Improvements

    The RISC-V architecture updates for the in-development Linux 5.17 kernel have been successfully submitted...

    https://www.phoronix.com/scan.php?pa...ux-5.17-RISC-V

  • #2
    Gotta say, the RISC-V platform stuff is really quite clean. Platform serial console, devicetree, SBI+HBI, etc. all make things a lot cleaner.

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    • #3
      Originally posted by microcode View Post
      Gotta say, the RISC-V platform stuff is really quite clean. Platform serial console, devicetree, SBI+HBI, etc. all make things a lot cleaner.
      Unless you like dealing with having RISC-V processors being permanently glued to one specific version of a customised kernel and not being able to replace it with a newer vanilla kernel like what is happening in ARM, device trees are an abomination.

      Even one of the Haiku developers is pleading for SiFive to use UEFI and drop the devicetree nonsense.

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      • #4
        This is a pretty cool board overall.

        "$665"

        Ok, it's not that cool.

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        • #5
          Originally posted by NateHubbard View Post
          This is a pretty cool board overall.

          "$665"

          Ok, it's not that cool.
          It is cool. And so much cheaper than official devkits from elsewhere ($10k+).

          It's a matter of context. These aren't going to sell in droves, and they aren't made in droves either.

          If you're a developer and need one, chances are somebody else than you will pay for it.

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          • #6
            It seems like fairly new product, anyone know why it is marked as "End of Life" on mouser: https://eu.mouser.com/ProductDetail/...FPYYkdMA%3D%3D

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            • #7
              Originally posted by Sonadow View Post

              Unless you like dealing with having RISC-V processors being permanently glued to one specific version of a customised kernel and not being able to replace it with a newer vanilla kernel like what is happening in ARM, device trees are an abomination.

              Even one of the Haiku developers is pleading for SiFive to use UEFI and drop the devicetree nonsense.
              What you're talking about is a misconception; devicetree is there for the machine/firmware to communicate the hardware configuration to the OS; the fact that neglected/broken SoCs have firmware that presents inaccurate devicetrees doesn't indicate that devicetree is broken. Further still, the complaint you linked is completely different; he's looking for consistent boot media selection, which is not related to devicetree.
              Last edited by microcode; 20 January 2022, 10:58 AM.

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              • #8
                Originally posted by microcode View Post

                What you're talking about is a misconception; devicetree is there for the machine/firmware to communicate the hardware configuration to the OS; the fact that neglected/broken SoCs have firmware that presents inaccurate devicetrees doesn't indicate that devicetree is broken. Further still, the complaint you linked is completely different; he's looking for consistent boot media selection, which is not related to devicetree.
                heh. in the end it all comes back to firmware. An yeah, it's a major issue that vendors constantly ship buggy downstream forks of uboot, kernels, etc.

                And then there's all the proprietary blobs needed to boot/run sifive's chips. but nobody seems to notice that. how was risc-v open again? oh right, no licence fees

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                • #9
                  Originally posted by Developer12 View Post
                  how was risc-v open again? oh right, no licence fees
                  Well, also there's considerable collaboration on new specs. I don't know why the perpetually negative people keep falling back on this talking point; nobody said that RISC-V was some sort of über copyleft ISA, and such a thing never had any chance. It's no less open than OpenRISC was.

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                  • #10
                    Originally posted by microcode View Post

                    Well, also there's considerable collaboration on new specs. I don't know why the perpetually negative people keep falling back on this talking point; nobody said that RISC-V was some sort of über copyleft ISA, and such a thing never had any chance. It's no less open than OpenRISC was.
                    Yeah, good luck getting access to those development mailing lists or proposing an extension if you're not a major industry player. LibreSoC (formerly LibreRISC-V) found out the hard way. OpenPOWER by comparison has been *far* more open and welcoming. At this point RISC-V is nothing but an industry boys-only club for companies that want to avoid arm licences.

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