Originally posted by mbello
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SiFive Details New Performance P650 RISC-V Core
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Originally posted by hajj_3 View Post
PowerVR works with risc-v chips...
Like the PowerVR support you already mentioned. It seems Imagination also wants to make their own risc-v based SOCs as well.
Apparently, Alibaba has a SOC that pairs a Vivante GPU with risc-v cores.
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Originally posted by bob l'eponge View PostThere's https://github.com/vortexgpgpu/vortex for the GPU part (although, right now, it's mainly focused on OpenCL, a Vulkan compatible implementation is still far away).
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Originally posted by PerformanceExpert View PostLet's ignore that it doesn't have a vector extension which would make any comparison with Cortex-A77 highly speculative. But what I'd like to know is whether anyone has proof of any OoO core from SiFive that has made it into silicon or even better, an actual product?
So far the progress you're talking about exists on powerpoint slides only.
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Originally posted by iskra32 View PostMight be easier to do that with another SBC manufacturer. The Raspberry Pi Foundation for all of it's good aspects is essentially tied to Broadcom.
They have committed to something like a 10-year service life for each model they sell. So, I'm sure they don't want to add other ISAs to their support burden, if they can possibly avoid it.
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Originally posted by CTown View Post
That would be very interesting, as that will give them scale to lower prices. Still, what GPU would be used in that case?
Originally posted by PerformanceExpert View Post
So will any high-performance RISC-V core implement the vector extension before 2025?
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Originally posted by Alexmitter View Post
The cores are. Not the Chips SiFive makes themself, again SiFive is a design house making license core designs.
Of course could this core fit in a mass market product, no doubt. But it won't be SiFive who makes the Chip. Its gonna be Allwinner, or StarFive, or T-Head or any other actual SoC maker.
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Having roughly the same Performance as ARM is nice but what about power consumption? I would love to see a comparison on that front as soon as there is an actual SOC out there.
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Originally posted by bob l'eponge View PostThere's https://github.com/vortexgpgpu/vortex for the GPU part (although, right now, it's mainly focused on OpenCL, a Vulkan compatible implementation is still far away).
As for the vector extension, you are wrong. There are vector extension in the RISC V instruction set. Unlike x86 and ARM8, the vector size is dynamic (there is no 128bits version, then 256 bits then 512 bits and so one). The CPU implementation actually dispatch the vectorized instruction as much as it's able to (so yes, there can be a 23 simultaneous operation per iterations in RISC V if the CPU has support for such number). This presents multiple advantages:
My point is no implementations with the vector extension exist yet (Xuantie 910 uses an earlier, incompatible version), and neither the P550 or P650 support it. That gets us to late 2023. So will any high-performance RISC-V core implement the vector extension before 2025?
1. You don't need to rewrite your SIMD code when a new version of the CPU/architecture is out
2. The same code will always performs as fast as possible on RISC-V
The cons are less obvious:
1. You don't have as many vectorized instructions as a x86 CPU, so your pipeline might be struck by a non vectorized complex mask instruction for example.
2. You can't port your NEON, AVX, SSE2 assembly by just finding a 1:1 match in the right instruction. You have to rethink the algorithm à-la OpenMP way.
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Originally posted by Alexmitter View Post
Keep in mind that those in order CPU cores already compete with OoO ARM Cores with all the fancy bells and whistles, and that at a significantly smaller footprint.
A main issue with the current FU chips is rather the low clock speed they have.
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