Originally posted by AlB80
View Post
DDR4 memory controller have only 32 banks in total (2 ch x 1 rank x 16 banks per rank).
DDR5 memory controller have 128 banks in total (2 ch x 2 subch x 2 rank x 32 banks per rank).
DDR4 memory transactions are often stalled due to bank collisions, thus even DDR4 good timings are not enough.
Comment