DDR4 vs. DDR5 Memory Performance For Intel Core i5-12600K Alder Lake On Linux

[MarkG]

It's really nothing to worry about, last I checked some stats, as a home user you're only encountering 1 (one!) bit flip per year on average.

Back in the day, I* brought up a "machine" (150k nodes of 32GB/node DDR4 soldered-down (sockets matter) at sea-level (altitude matters)). There was never a moment where less than a dozen nodes were running my Machine Check handler due to an ECC error. We scheduled the benchies to run over-night because day vs night mattered too.

So, even at home, I don't build machines without ECC. A few years ago, some class "M" solar flare thing hit Earth and 2 of my 3 machines logged ECC single-bit errors.

Edit: * with a little help from my friends

[piotrj3]

The baked-in ECC is to protect against errors that actually occur within an individual chip and really point to the fact that individual memory cells are becoming less reliable with smaller lithography & faster clocks to the point that adding complexity to each DRAM die became necessary.

Traditional ECC with the extra chip and ECC in the memory controller is still necessary to handle errors that occur during transfer of data back & forth from the CPU, which can't be addressed by the in-chip ECC.

I bet one reason for ECC baked in, is because of row hammer attacks. DDR3 was vulnerable to it, DDR4 was sort of not vulnerable due to periodic refreshes except very extreme scenarios, but i think DDR5 without ECC built in would be way more vulnerable to it then DDR4.

[bug77]

I bet one reason for ECC baked in, is because of row hammer attacks. DDR3 was vulnerable to it, DDR4 was sort of not vulnerable due to periodic refreshes except very extreme scenarios, but i think DDR5 without ECC built in would be way more vulnerable to it then DDR4.

It's not because of that, it's because DDR5 won't hold the data long enough without it.

[Slartifartblast]

Others have probably said it but it would be nice to see the effect of DDR5 vs DDR4 on iGPU performance.

[sdack]

DDR4-4400 is performing poorly here. Looks like the BIOS does not make much of a difference between DDR4-4400 and DDR4-3600.

[waxhead]

The baked-in ECC is to protect against errors that actually occur within an individual chip and really point to the fact that individual memory cells are becoming less reliable with smaller lithography & faster clocks to the point that adding complexity to each DRAM die became necessary.

Traditional ECC with the extra chip and ECC in the memory controller is still necessary to handle errors that occur during transfer of data back & forth from the CPU, which can't be addressed by the in-chip ECC.

Do you know if ddr5 is vulnerable to rowhammer and friends as well? That for be is the same as defective hardware and as you more or less point of they have to fight bugs in hardware by adding complexity which again is a breeding ground for more bugs....

[cchi]

DDR4-4400 is performing poorly here. Looks like the BIOS does not make much of a difference between DDR4-4400 and DDR4-3600.

I think it is because of the memory gear setting. From what I have seen it is able to function in 1:1 mode until 3600, but at 4400 it has to be set to 1:2. So the the memory controller frequency drops from 3600 to 2200.

[bug77]

DDR4-4400 is performing poorly here. Looks like the BIOS does not make much of a difference between DDR4-4400 and DDR4-3600.

I've seen the same in other tests. The way I understand it is AL likes low latency, whose lack thereof is only mitigated by the massive additional bandwidth of DDR5.

[AlB80]

What memory configurations were used in terms of ranks/banks?

[chuckula]

Do you know if ddr5 is vulnerable to rowhammer and friends as well? That for be is the same as defective hardware and as you more or less point of they have to fight bugs in hardware by adding complexity which again is a breeding ground for more bugs....

Nobody will know for sure until security researches start hammering DDR5. From what I've heard rowhammer is easiest to execute on laptops where DIMMs are run at the lowest voltages practical to reduce power consumption. They can still operate normally at those voltages, but are more vulnerable to rowhammer. The attacks can work on desktop DIMMs and even (in some cases) ECC RAM on servers, but they aren't as likely to succeed quickly.