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Intel Core i5 12600K / Core i9 12900K "Alder Lake" Linux Performance

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  • #51
    TYPO TYPO TYPO

    Originally posted by phoronix View Post
    Alder Lake was also performing well with TensorFlow Lite.

    PLAIDML PLAIDML PLAIDML

    As well under the PlaidML machine learning software was a good showing for Alder Lake
    You apparently forgot to replace that placeholder THERE THERE THERE

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    • #52
      Originally posted by birdie View Post

      Intel Thread Director is not even scheduled for 5.16 which means Linux is unlikely to get full support for ADL CPUs in the next 6-9 months (!) considering that most distros, sans Arch and Fedora, don't upgrade to the mainline kernel right away.
      Thread Director is one of Intel's hyped ~Technologies~. The Linux way of dealing with heterogenous CPUs is for the plaform/device tree/etc. to inform the kernel of the "capacity" of each core. I wonder if that's plumbed up for Alder Lake?

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      • #53
        Originally posted by Myownfriend View Post

        I've heard the same but a 16 E-core chip would be pretty tiny. For data centers I'm sure they'd prefer to have the same die area but with P-cores replaced with E-cores which would be about 40 cores.
        The point is that instead of using a 40 P core processor you could use a 160 E core processor in the same die area but with 40% less power consumption.

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        • #54
          Originally posted by sdack View Post
          And Intel allows for competition while others in the IT industry did everything they could to destroy theirs.
          A bold statement considering the many times Intel lost in court over anti-competitive practices (and had to pay billions to AMD). They seem to only allow competition from AMD up to a certain point, basically allowing them to be a deterrent for antitrust investigations from governments. The situation has changed a bit lately with the advent of ARM in more markets and the general lack of antitrust action from governments (when compared for example to the 90's).

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          • #55
            Speaking of p- vs e-cores, here's in depth coverage from computerbase.de:



            It's quite dense German text but Google Translate probably can manage it.

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            • #56
              Good showing and in desperate need of a "tock" (bring back the "tock")

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              • #57
                While Alder Lake seems to be a great step forward for Intel, from a consumer perspective, Raptor Lake should be even more appealing. At least I expect them to solve the AVX-512 dilemma with their new Thread Scheduler with that iteration, maybe they fine tune their 10 nm process a bit further and fix a couple of other architecture bugs. By then I also expect DDR5-pricing to be more sane.

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                • #58
                  Originally posted by cjcox View Post
                  Good showing and in desperate need of a "tock" (bring back the "tock")
                  Tock was a new microarchitecture, so with ADL there's two Tocks - Golden Cove (P-cores) and Gracemont (E-cores). You can argue that it's a Tock-Tock-Tick as well, at least for the desktop vs. Rocket Lake, since it's the first desktop processor on the Intel 7 (previously known as 10ESF) manufacturing process

                  Originally posted by ms178 View Post
                  While Alder Lake seems to be a great step forward for Intel, from a consumer perspective, Raptor Lake should be even more appealing. At least I expect them to solve the AVX-512 dilemma with their new Thread Scheduler with that iteration, maybe they fine tune their 10 nm process a bit further and fix a couple of other architecture bugs. By then I also expect DDR5-pricing to be more sane.
                  I'm not sure that the AVX-512 problem can be solved in any other way than by introducing it to E-cores, at least without breaking backwards compatibility along the way.

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                  • #59
                    Originally posted by ms178 View Post
                    While Alder Lake seems to be a great step forward for Intel, from a consumer perspective, Raptor Lake should be even more appealing. At least I expect them to solve the AVX-512 dilemma with their new Thread Scheduler with that iteration, maybe they fine tune their 10 nm process a bit further and fix a couple of other architecture bugs. By then I also expect DDR5-pricing to be more sane.
                    Guess the "AVC512 dilemma" is not caused by the Thread-Scheduler but more by the E-Cores not supporting it.
                    Having cores with different ISAs / extensions isnĀ“t supported by most platforms at least not if you want to move threads between these cores.

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                    • #60
                      Originally posted by numacross View Post

                      I'm not sure that the AVX-512 problem can be solved in any other way than by introducing it to E-cores, at least without breaking backwards compatibility along the way.
                      But ... can't the OS simply never let AVX-512 tasks run on e-cores? It's trivial to detect AVX-512 instructions and then pin the application to the appropriate cores. If I've said something stupid, please let me know.

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