Originally posted by Myownfriend
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SiFive Has A New RISC-V Core To Improve Performance By 50%, Outperform Cortex-A78
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Originally posted by tuxd3v View PostIn my Opinion, we should get this news with *Big* Grains of Salt..because SiFive promised the same before, and its other cores were not even on par with a cortex a53..
This is something you can verify yourself, with your own code.
Here's a benchmark I wrote for my own purposes and have been using since before I even knew RISC-V existed: https://hoult.org/primes.txt
Some benchmarks such as GeekBench are heavy on programs that need SIMD and/or crypto instructions (e.g. SHA) to perform well. Currently shipping RISC-V chips including SiFive's simply don't have those because extensions containing those instructions have not yet been ratified. However those extensions are right now in their 45 day Public Comment period before ratification, and will be ratified before the end of the year.
All the major RISC-V companies have cores ready to go as soon as they know those extensions aren't going to change in the ratification process. That includes SiFive, Andes, and updated versions of Alibaba's cores (which have already shipped with a draft version of the vector extension, for example).
There is nothing wrong with SiFive's cores with regard to the things they actually implement.
SiFive's demo SoCs e.g. FU540 FU740 suck a bit. But that's not their core business, just as it's not ARM's business. Both companies sell CPU cores to companies that *do* know how to put them in good SoCs: Qualcomm, AllWinner, Samsung etc
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Originally posted by cb88 View Post
You gotta remember M1 is impressive but not *that* impressive... its just a node ahead of everyone else because Apple pays more than anyone else for fab access. I'd say thier architecture is on par with monolithic x86 CPUs at this point but thats already late to the game architecturally.
It's more than a node advantage. It's an architectural advantage coupled with a node advantage. The M1 chip has 10 instruction decoders due to the consistent instruction code size. AMD indicates they have a upper bound of 4 decoders due to the variable length x86 instruction codes.
The M1 in a notebook can outperform AMD/Intel running on battery power even with the AMD/Intel units plugged into AC.
BTW, there are some good youtube videos discussing the virtues of the M1 chip.
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Originally posted by cbxbiker61 View Post
I'm not an Apple fan. I dislike their anti-consumer business practices. I don't think that is likely to change since Apple has a following that gulps down their kool-aid without even a thought as to how Apple takes advantage of them. With that said, the M1 chip is *that" amazing.
It's more than a node advantage. It's an architectural advantage coupled with a node advantage. The M1 chip has 10 instruction decoders due to the consistent instruction code size. AMD indicates they have a upper bound of 4 decoders due to the variable length x86 instruction codes.
The M1 in a notebook can outperform AMD/Intel running on battery power even with the AMD/Intel units plugged into AC.
BTW, there are some good youtube videos discussing the virtues of the M1 chip.
Its a fine chip at 5nm, nothing less, nothing more.
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Originally posted by cb88 View PostYou gotta remember M1 is impressive but not *that* impressive... its just a node ahead of everyone else because Apple pays more than anyone else for fab access. I'd say thier architecture is on par with monolithic x86 CPUs at this point but thats already late to the game architecturally.
https://www.anandtech.com/show/16252...le-m1-tested/4
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Originally posted by cb88 View Post
You gotta remember M1 is impressive but not *that* impressive... its just a node ahead of everyone else because Apple pays more than anyone else for fab access. I'd say thier architecture is on par with monolithic x86 CPUs at this point but thats already late to the game architecturally.
I've beaten this horse to death by now but the M1 is an 8-way decoding core. AMD's zen tops out at 4 and intel's best at 5. And that's just the tip of the microarchitectureal iceberg. The MI can keep FAR more instructions in flight, searching for uops to fuse and optimize out. It doesn't just have a nice process, it has an insane IPC (Instructions-Per-Clock) and that doesn't change even if your chip is made on 180nm (go ask LibreSoC about that).
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Originally posted by cbxbiker61 View Post
I'm not an Apple fan. I dislike their anti-consumer business practices. I don't think that is likely to change since Apple has a following that gulps down their kool-aid without even a thought as to how Apple takes advantage of them. With that said, the M1 chip is *that" amazing.
It's more than a node advantage. It's an architectural advantage coupled with a node advantage. The M1 chip has 10 instruction decoders due to the consistent instruction code size. AMD indicates they have a upper bound of 4 decoders due to the variable length x86 instruction codes.
The M1 in a notebook can outperform AMD/Intel running on battery power even with the AMD/Intel units plugged into AC.
BTW, there are some good youtube videos discussing the virtues of the M1 chip.
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