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AMD Posts New "AMD-PSTATE" CPUFreq Driver Leveraging CPPC For Better Perf-Per-Watt

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  • #61
    Originally posted by numacross View Post
    That depends on the workload, take for example this:
    even in that workload you have number of slow intel chips
    Originally posted by numacross View Post
    I'm sorry, I don't know what you mean.
    i mean that without chiplet you have large chip and its different sides are almost as far away from each other as different chiplets.

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    • #62
      Originally posted by pal666 View Post
      even in that workload you have number of slow intel chips
      So? I can go back to Bulldozer and show you some inefficient AMD chips

      Originally posted by pal666 View Post
      i mean that without chiplet you have large chip and its different sides are almost as far away from each other as different chiplets.
      On-chip interconnects are designed and behave differently from external ones. That is one of the reasons Zen 3 uses a variant of a dual ring bus design inside the CCD and not Infinity Fabric.

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      • #63
        Originally posted by numacross View Post
        So?
        single chip is worse than chiplets
        Originally posted by numacross View Post
        I can go back to Bulldozer and show you some inefficient AMD chips
        both cpus i'm talking about were released in 2020. feel free to go back to bulldozer from 2020

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        • #64
          Originally posted by numacross View Post
          So? I can go back to Bulldozer and show you some inefficient AMD chips
          Well yea, but we're talking about Zen not Bulldozer and Bulldozer was monolithic.

          Originally posted by numacross View Post
          On-chip interconnects are designed and behave differently from external ones. That is one of the reasons Zen 3 uses a variant of a dual ring bus design inside the CCD and not Infinity Fabric.
          "Infinity Fabric" is just their name of their system bus and data bus. If a 5950X were a monolithic die, it would still have a dual ring bus layout with the IF connecting the two CCXs with each other and with the memory controller and other I/O blocks. That's what they did on their single-chiplet Zen+ cores and their GPUs. In fact, the IFOP connects the CCDs and cIOD together on a ring bus.

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          • #65
            Originally posted by pal666 View Post
            single chip is worse than chiplets
            both cpus i'm talking about were released in 2020. feel free to go back to bulldozer from 2020
            Yes, 10700K is worse, but 11700K is way better. So you're just going to ignore the latter because it doesn't fit your original statement?

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            • #66
              Originally posted by numacross View Post
              Yes, 10700K is worse, but 11700K is way better. So you're just going to ignore the latter because it doesn't fit your original statement?
              lol, the one ignoring unfitting data is you. you can only cherry-pick unrealistic microbenchmark with newer generation of intel cpu.
              the fact is chiplets are superior tech, even intel is switching to chiplets. faster benchmark or intel is use of special case assembler instructions, they don't extrapolate to normal software

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              • #67
                Originally posted by pal666 View Post
                lol, the one ignoring unfitting data is you. you can only cherry-pick unrealistic microbenchmark with newer generation of intel cpu.
                the fact is chiplets are superior tech, even intel is switching to chiplets. faster benchmark or intel is use of special case assembler instructions, they don't extrapolate to normal software
                And you keep generalizing while ignoring what I wrote in the original post, but it's OK. I'll let you "have the last word" now

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                • #68
                  Originally posted by birdie View Post

                  I'm using turbostat to get my Ryzen CPU power use.

                  Here's a fork with support for Zen 3 CPUs: https://github.com/Ta180m/zenpower3
                  That's the fork I've been using, It's been in the AUR since April ish iirc .

                  I'll give turbostat a go though

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                  • #69
                    Originally posted by pete910 View Post

                    That's the fork I've been using, It's been in the AUR since April ish iirc .

                    I'll give turbostat a go though
                    turbostat may run without root/sudo, but you'll need to run this to make it work:

                    Code:
                    setcap cap_sys_rawio,cap_sys_nice=+ep /usr/bin/turbostat
                    For some reasons I have to run this command on every boot cause otherwise these flags are lost.

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