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Opt-In L1 Cache Flushing To Try For Linux 5.15 To Help With The Paranoid, Future CPU Vulnerabilities

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  • Opt-In L1 Cache Flushing To Try For Linux 5.15 To Help With The Paranoid, Future CPU Vulnerabilities

    Phoronix: Opt-In L1 Cache Flushing To Try For Linux 5.15 To Help With The Paranoid, Future CPU Vulnerabilities

    Worked on for more than one year is the patches out of Amazon for allowing opt-in L1 data cache flushing on context switching. This L1d flushing is done in the name of greater security given the various CPU speculative execution hardware vulnerabilities these days and protecting against other possible future vulnerabilities. After trying to get the code merged last summer, Linus Torvalds called it "beyond stupid" and reverted the code but now for Linux 5.15 a revised form of it was submitted...

    https://www.phoronix.com/scan.php?pa...-Flushing-Mech

  • #2
    Originally posted by phoronix View Post
    Since then the code has been revised so now it should be less "stupid".
    Too good. 🤣🤣

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    • #3
      I'm not sure why Amazon is so determined to get this patchset mainlined.

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      • #4
        I feel it is just a matter of time before we see new vulnerabilities in Intel's upcoming 12th-generation CPU "Alder Lake" and AMD's upcoming Zen 4 CPU.

        Also, Alder Lake is rumored to use very high amount of energy. Rumors are that it can draw up to 250 W. That is pretty insane!

        I think we really need to move away from both x86 and from SMT.

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        • #5
          Originally posted by uid313 View Post
          I feel it is just a matter of time before we see new vulnerabilities in Intel's upcoming 12th-generation CPU "Alder Lake" and AMD's upcoming Zen 4 CPU.
          https://www.tomshardware.com/news/ry...security-fixes

          Originally posted by uid313 View Post
          Also, Alder Lake is rumored to use very high amount of energy. Rumors are that it can draw up to 250 W. That is pretty insane!

          I think we really need to move away from both x86 and from SMT.
          Existing Rocket Lake and Comet Lake CPUs already pull up to 250W, it's called PL2. There's nothing new.

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          • #6
            Originally posted by avem View Post
            Existing Rocket Lake and Comet Lake CPUs already pull up to 250W, it's called PL2. There's nothing new.
            But I think maybe Rocket Lake, Comet Lake and Alder Lake draws more power than earlier generations. I don't know if Alder Lake even draws more than Rocket Lake and Comet Lake.

            But for me who have an Haswell, if I buy a new CPU then it draws more power than my current CPU, hence it is actually worse in some aspects (even though it is faster)?

            I like to have a fast CPU, but I also like it to run cool, stay cool, and be easy to cool without massive and expensive heatsinks and loud fans. I also want it to use little energy and provide a low TCO.

            Maybe the TCO of a new CPU is higher if I have to pay a higher electricity bill every month.

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            • #7
              Is it possible to realize CPUs without caches?

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              • #8
                Originally posted by uid313 View Post

                But I think maybe Rocket Lake, Comet Lake and Alder Lake draws more power than earlier generations. I don't know if Alder Lake even draws more than Rocket Lake and Comet Lake.

                But for me who have an Haswell, if I buy a new CPU then it draws more power than my current CPU, hence it is actually worse in some aspects (even though it is faster)?

                I like to have a fast CPU, but I also like it to run cool, stay cool, and be easy to cool without massive and expensive heatsinks and loud fans. I also want it to use little energy and provide a low TCO.

                Maybe the TCO of a new CPU is higher if I have to pay a higher electricity bill every month.
                Sounds like you are looking for a lower-to-mid-range CPU. Even a Ryzen 3100 will beat a Haswell chip easily performance-wise while having significantly lower power consumption (22nm vs 7nm is a huge difference).

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                • #9
                  I see that disabling hyperthreading is recommended as a fix for at least some of the related attacks. Does that mean that running on the Alder Lake efficient cores (Gracemenont) would allow bypassing L1 data cache flushes?

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                  • #10
                    Originally posted by Azrael5 View Post
                    Is it possible to realize CPUs without caches?
                    Technically, yes, but not with any semblance of performance.

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