Originally posted by Duve
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New Spectre Variants Discovered By Exploiting Micro-op Caches
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This will be a neverending story, until formal verification and/or algebraic construction will be used thorough the design stages. (And even then, you could find holes in the invariants)
and I bet x86 will never reach that stage, emulating a crappy ISA and memory model makes things ugly and complex if you want performance.
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This kind of thing is not fixable. Branch predictors are very important for performance, same as cache. There will always be things you can deduce from studying the access latency. The best you can do is introduce some kind of variability and take some degree of performance hit from doing so.
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Originally posted by cynical View PostThis kind of thing is not fixable. Branch predictors are very important for performance, same as cache. There will always be things you can deduce from studying the access latency. The best you can do is introduce some kind of variability and take some degree of performance hit from doing so.
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Originally posted by discordian View PostThis will be a neverending story, until formal verification and/or algebraic construction will be used thorough the design stages. (And even then, you could find holes in the invariants)
and I bet x86 will never reach that stage, emulating a crappy ISA and memory model makes things ugly and complex if you want performance.
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Originally posted by ermo View Post
This is assuming that the hardware implementation of your ideal design is itself perfect. And from what you write (and how you write it), it is highly probable that you already understand that this is not often the case in the real world...
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Originally posted by milkylainen View Post
Side channels in CPUs are not tied to any specific ISA. The ISA almost has 0 relevance to this.
ARM CPUs of similar complexity are equally likely to suffer such sidechannels.
If you prefer you can say that Intel and AMD design teams suck. I'll buy that as an opinion. But not the ISA.
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Originally posted by Vistaus View Post
Then you haven't been on tech forums lol. According to people on tech forums, AMD is the holy grail and they can do anything Intel can't and never make mistakes. So surely they will be able to fix Spectre and Meltdown without performance hits. I mean… right?
Originally posted by chithanh View PostYou don't need a new architecture. Intel already has an architecture that is largely immune to Spectre, namely IA64. The Itanium's EPIC (not to be confused with EPYC) model moves the complexity which led to Spectre from the CPU into the compiler instead.
And last that I head of Itanium, it just got cut off of life-support.
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