Announcement

Collapse
No announcement yet.

AMD EPYC 7003 "Milan" Linux Benchmarks - Superb Performance

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • #41
    Originally posted by bridgman View Post

    Not sure if it hurts or helps your argument, but both Zen2 and Zen3 used 7nm for the CPU chiplets and so Zen2 was the die shrink.
    Thank you for the correction. I had forgotten that in my stream of thought. And let me clear, my equating Intel's "Tick Tock" CPU arch. cycle with AMD is a rough analogy to be sure. But I think even its "roughness" it still applies pretty well. So with the correction that Zen 2 was 7nm AND was a BIG arch improvement over Zen and Zen+ then I still stand by the notion that Zen 2 was a "Tock" and Zen 3, PARTICULARLY now knowing it was not a die shrink of Zen 2, still is as I stated above an "enhanced "Tock" to use Intel parlance. And as it was noted by Intel itself an enhanced " Tock" cadence was bestowed upon an existing microarch that could not be shrunk at the time but had some tweaks to the previous arch. but NOT enough to consider it a new arch. And that's my opinion of Zen 3.

    Ergo I think my argument stands firm that Zen 4 WILL BE a new arch in the Zen family. A full blown "Tock". It really has to be. The CCXs and Cache complex alone has to be significantly changed and reordered to take full advantage of Infinity Architecture 3.0, not to mention interoperability with CCIX for Xlinx and GenZ for tying racks together with Cache Coherency as well.

    Also to get greater IPC and aggregate performance uplift at the same core count AND same core clock of Zen 3 than Zen 3 got over Zen 2 requires very significant arch. changes. Much more so than Zen 3 over Zen 2. Once again making Zen 4 a "Tock" type arch advancement.

    AMD has to do this for Zen 4 at 5nm. If for nothing else than for Zen 4 to be the new arch. to get Zen 5 to 3nm. Because it's over for x86 at 3nm. After that, by 2030, I can see an entire motherboard being covered by chiplets with 3D embedded MRAM in place of DDR and SSDs being replaced with Optane like or Zram like storage. In other words...every PC will be HP's "The Machine". Because you won't be able to get performance uplift by shrinking the CPU or GPU anymore once you hit 3nm. Why? Physics. And Quantum Physics at that. Your data will just Quantum Physically tunnel out past 3nm.
    Last edited by Jumbotron; 17 March 2021, 02:27 AM.

    Comment


    • #42
      Originally posted by bridgman View Post
      Not sure if it hurts or helps your argument, but both Zen2 and Zen3 used 7nm for the CPU chiplets and so Zen2 was the die shrink.
      FWIW, let's not forget that the Ryzen 3000XT-series introduced low-level process refinements that probably qualify as a "+", in Intel's manufacturing parlance.

      Comment


      • #43
        this is a great test. well done to phoronix Team.
        i am wonder how will be the test between Intel 5220R 2P, 6226R 2P with AMD EPYC 2P 7313,7453,7453

        since these are at the price range of USD1300 to USD1500 Price range per socket.

        eventually AMD 1st 2nd gene single thread performance always unable to match with Intel 5220R/6226R, this is crucial for virtual firewall appliance that license per vcpu on virtualization environment.

        this wil let consumer to decide which to go when choosing the right processor at this price range.

        thanks again for the great benchmark article


        Comment

        Working...
        X