Ampere Altra Performance Shows It Can Compete With - Or Even Outperform - AMD EPYC & Intel Xeon

[t.s.]

A lot of people overlook that Apple's M1 is made with 5nm, and not 7nm like AMD and Intel is not even at 10nm. Also the mobile chips AMD has is really outdated, even for their tech. The Ryzen 4000 series is based on Zen2 not Zen3, and their graphics is Vega, which is like 4 year old graphics. If AMD makes mobile chips with 5nm based on Zen3, and uses RDNA2 for graphics then it'll be Apple that'll have an uphill battle. Assuming people who buy Apple products ever consider buying other products. Intel is very behind and they could fix their problems by using someone else's manufacturing process. They're also working on graphics which is yet to be seen how that performs.

Provided that AMD has brain to think that way.

[Brane215]

Meh. They are trying to ride M1 hype train. They got shitload of cores and all they can show with it is moderate speedup ... against Rome.
Not a word about Naples, which is at the door as we speak.
Also, keep in mind that AMD has designed whole platform to be relatively easily retargetable to different ISA.
I just hope they do their work right and go RISC-V.

[shmerl]

Or you can get all of it with ARM.

I highly doubt it will ever compare to x86 in all aspects. ARM is not a replacement for x86. It's an alternative that has its use. Let someone make a new microarchitecture that's not ARM. Then we'll see.

[Brane215]

I highly doubt it will ever compare to x86 in all aspects. ARM is not a replacement for x86. It's an alternative that has its use. Let someone make a new microarchitecture that's not ARM. Then we'll see.

I think alternatives will kick x_86 arse in short term. But RISC-V seems to be way better option.
AMD would be smart to look how to expand in that teritory ASAP.

[GruenSein]

They already have with M1. Wait until they release their 16-32 Core CPU for the iMac and the desktop PowerMac.

The Age of ARM is here. X86 tech is now legacy.

You can get wildly ripped off on price but get good energy efficiency with Intel.

You can get better value and bang for your computing buck with AMD but you get boned on power draw.

Or you can get all of it with ARM.

Do you sell these chips or something? Your posts read like a very aggressive ad.

[kieffer]

The figures for the `stream` memory benchmark look strange to me. The figures are very good in comparison with the AMD competitor (same number of memory channels). But the internal topology of the ARM system states 8 NUMA domains which means that each chip is composed of 4 sub-modules with 2 memory channels each and 20 cores.
Would it be possible to have the EPYC system with NPS=4 and one NUMA domain per L3 cache ? as suggested in this documentation:

https://developer.amd.com/wp-content/resources/56827-1-0.pdf

[carewolf]

This is what we had hoped for from AMD's Berlin ARM architecture, too bad it never got anywhere.

[coder]

I've heard this before with X86 being legacy. TheAmpere Ultra isn't a bad performer but it didn't exactly win the majority of those benchmarks.

It did actually win a majority, but some of the benchmarks it won are variations of each other.

The thing that often arouses my suspicion is how the benchmarks featured in these articles are chosen. PTS has thousands of test cases, yet there are only about 25 or so that feature here.

[coder]

Do you sell these chips or something? Your posts read like a very aggressive ad.

Honestly, I can understand Jumbo's enthusiasm. I think it's exciting to finally move beyond x86, and this will mean a huge shakeup of the CPU industry, as well. However, the industry is not well-served if we let our enthusiasm get ahead of what a careful reading of the facts can support.

ARM has made some very big promises for their next generation of cores, and they have a strong track-record of delivering on their word. So, that will be something to watch.

https://www.anandtech.com/show/16073/arm-announces-neoverse-v1-n2

[coder]

You mentioned having an "up-to-date" compiler is very important. I was wondering if you could have ran the tests with the Intel and AMD software being compiled for march=native (or at least znver2/skylake), since obviously the N1 compiler is going to be highly optimized already.

He specifies the compilation options in the image captions of the plots, but some of the tests, like the TNN deep learning benchmark, do not use -march=native. This should mean that x86 is only using SSE, instead of AVX2 or AVX-512. That would put them at a huge disadvantage.