Announcement

Collapse
No announcement yet.

The Linux Kernel Prepares For Larger AMD CPU Microcode Updates

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • The Linux Kernel Prepares For Larger AMD CPU Microcode Updates

    Phoronix: The Linux Kernel Prepares For Larger AMD CPU Microcode Updates

    Future AMD CPUs (more than likely, Zen 3) will be bearing larger CPU microcode sizes, resulting in the Linux kernel needing a change to load them...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    12KB? This must be one hefty microcode if it needs triple the size over one generation. Perhaps Zen3 has more going on than I thought.

    Comment


    • #3
      My guess is that they're possibly not using all of it, but leaving some headroom.

      On the bad side: More BLOB stuff in our (future) computers. :/
      Stop TCPA, stupid software patents and corrupt politicians!

      Comment


      • #4
        More space to put spyware and other behind-our-backs software.
        Disgusting future!

        Comment


        • #5
          Originally posted by schmidtbag View Post
          12KB? This must be one hefty microcode if it needs triple the size over one generation. Perhaps Zen3 has more going on than I thought.
          The Intel microcode file is 3 MB, I've always wondered why AMD's is so much smaller.

          Comment


          • #6
            Originally posted by GrayShade View Post

            The Intel microcode file is 3 MB, I've always wondered why AMD's is so much smaller.

            Comment


            • #7
              Originally posted by schmidtbag View Post
              12KB? This must be one hefty microcode if it needs triple the size over one generation. Perhaps Zen3 has more going on than I thought.
              In a perfect world we would never need to download CPU microcode, because the processor would be perfect when shipped. Unfortunately, we don't live in that world.

              All current CPU's have large microcode/picocode/nanocode stashes inside the chip. The downloadable microcode files are overrides (patches) to fix specific issues encountered and understood and that are fixable via updates (not all are) after manufacturing. Expanding the ability to have larger individual fixes is likely both a realization that some fixes are becoming more complex, and that the microcode is becoming more verbose (it is often horizontal in nature, which is very wide (more bits)).

              Comment


              • #8
                Originally posted by GrayShade View Post

                The Intel microcode file is 3 MB, I've always wondered why AMD's is so much smaller.
                My guess is, just a guess, that AMD microcode is compiled into native micro-ops and Intel's microcode is compiled into an IR that then gets interpreted on the chip.

                Comment


                • #9
                  Originally posted by Danny3 View Post
                  More space to put spyware and other behind-our-backs software.
                  Microcode can't have that, it runs the low-level electronic blocks in the processor, it has no understanding or need to understand anything more than low-level electronic functionality.

                  Having functionality to microcode or having a bigger microcode "patch" loaded on boot means you can fix or at least deal with more CPU bugs in a saner way.

                  Spyware and other more complex stuff is run in the board firmware and ME/PSP, that are actual OSes running on actual processors.
                  Last edited by starshipeleven; 15 April 2020, 11:33 AM.

                  Comment


                  • #10
                    Originally posted by duby229 View Post
                    My guess is, just a guess, that AMD microcode is compiled into native micro-ops and Intel's microcode is compiled into an IR that then gets interpreted on the chip.
                    That would nuke performance and require a bigass interpreter stored in the chip.
                    (X) doubt

                    Comment

                    Working...
                    X