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AMD Announces EPYC 7532 + EPYC 7662 As Newest Rome Processors

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  • starshipeleven
    replied
    Originally posted by CochainComplex View Post
    My naive assumption would be silicon lottery with defect caches (is that even possible)?
    Cache is a pretty big surface area (relatively speaking) so yeah, defect caches are a thing just as defect cores.

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  • starshipeleven
    replied
    Originally posted by pegasus View Post
    So they're still holding back on the lower core count cpus with full cache? Or maybe the niche for those cpus is just too small for them ... It's maybe easier to develop a bios feature to disable some number of cores per ccx.
    Yes it is easier but it's kind of retarded to disable cores and sell the part for cheap when you could NOT disable the core and sell this CPU for A LOT more as a mid/high end part. AMD CPUs are literally flying off the shelves in server market at the moment, and that takes priority over cheaper parts.

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  • andrewjoy
    replied
    "Just" a 32 Core
    What a time to be a sysadmin. When single socket 32 core processors are the mid tier ...... . Not long ago i remember a sysadmin calling a dual socket 4 cores per socket server a "beast". (Still running too but with some kock off 8 core qualifying samples i got off ebay for mucho cheap price, warranty lasts till you open the box type of deal, but they will hold out till i get budget for a 24core rome.)

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  • CochainComplex
    replied
    Originally posted by pegasus View Post
    So they're still holding back on the lower core count cpus with full cache? Or maybe the niche for those cpus is just too small for them ... It's maybe easier to develop a bios feature to disable some number of cores per ccx.
    My naive assumption would be silicon lottery with defect caches (is that even possible)?

    Leave a comment:


  • tchiwam
    replied
    I ordered the 7262 exactly for that reason...

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  • pegasus
    replied
    So they're still holding back on the lower core count cpus with full cache? Or maybe the niche for those cpus is just too small for them ... It's maybe easier to develop a bios feature to disable some number of cores per ccx.

    Leave a comment:


  • skeevy420
    replied
    Originally posted by torsionbar28 View Post
    No kidding. This CPU cache is larger than my first hard drive. Woah!
    And here I was thinking that 640K was all we'd ever need.

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  • torsionbar28
    replied
    Originally posted by schmidtbag View Post
    And here I was thinking the original amount of cache was a lot...
    No kidding. This CPU cache is larger than my first hard drive. Woah!
    Last edited by torsionbar28; 19 February 2020, 11:01 AM.

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  • Michael
    replied
    Originally posted by andrei_me View Post
    Michael typo:
    "Remaining at the top end of the Rome line-up is the EPYC 7442", shouldn't it be 7742?
    Yep fixed thanks.

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  • schmidtbag
    replied
    And here I was thinking the original amount of cache was a lot...

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