AMD Announces EPYC 7532 + EPYC 7662 As Newest Rome Processors

[phoronix]

Phoronix: AMD Announces EPYC 7532 + EPYC 7662 As Newest Rome Processors

AMD has expanded their 7002 series "Rome" family with the availability today of the EPYC 7662 as their latest 64-core / 128-thread offering and the EPYC 7532 as a new 32-core part but with a full 256MB cache to offer more per-core L3 cache than other 32-core processors...

http://www.phoronix.com/scan.php?page=news_item&px=AMD-EPYC-7532-EPYC-7662

[CochainComplex]

*intel left the chat*

Well they have to come up with good stuff. I dont want to be in their CPU department now..

[andrei_me]

Michael typo:
"Remaining at the top end of the Rome line-up is the EPYC 7442", shouldn't it be 7742?

[schmidtbag]

And here I was thinking the original amount of cache was a lot...

[Michael]

Michael typo:
"Remaining at the top end of the Rome line-up is the EPYC 7442", shouldn't it be 7742?

Yep fixed thanks.

[torsionbar28]

And here I was thinking the original amount of cache was a lot...

No kidding. This CPU cache is larger than my first hard drive. Woah!

[skeevy420]

No kidding. This CPU cache is larger than my first hard drive. Woah!

And here I was thinking that 640K was all we'd ever need.

[pegasus]

So they're still holding back on the lower core count cpus with full cache? Or maybe the niche for those cpus is just too small for them ... It's maybe easier to develop a bios feature to disable some number of cores per ccx.

[tchiwam]

I ordered the 7262 exactly for that reason...

[CochainComplex]

So they're still holding back on the lower core count cpus with full cache? Or maybe the niche for those cpus is just too small for them ... It's maybe easier to develop a bios feature to disable some number of cores per ccx.

My naive assumption would be silicon lottery with defect caches (is that even possible)?