The Combined Impact Of Mitigations On Cascade Lake Following Recent JCC Erratum + TAA

[carewolf]

Disabling HT and enabling TSX is a weird combination. Wouldn't the paranoid extreme be to disable both?

[Michael]

Disabling HT and enabling TSX is a weird combination. Wouldn't the paranoid extreme be to disable both?

It was mainly to show the maximum mitigation impact.

[carewolf]

It is not affected by tsx in particular.

Does it even have TSX? I think TSX is one of the Intel extensions AMD hasn't picked up.

[starshipeleven]

For the average Joe...
Does Windows always update microcode or does it rely on the hw vendor to do it?

The latter, Microcode updates are provided by the vendor to Microsoft. THey may or may not test it (and I mean literally, they did ship obviously broken shit in the past for Pentium Anniversary edition for example)

[CochainComplex]

And this is likely still just the tip of the iceberg. Researchers are concentrating on Intel because of huge invested interests- data centers from Google and such are standardized on Intel processors. This means AMD and POWER haven't had as much attention. There's likely bugs in them that will likewise have performance hits when disabled or worked around. Researchers are also starting to turn their attention to GPUs and security implications. This is ignoring the problem with the black boxes that are IME, PSP, and the base band microcontrolers on most server motherboards. We're going to need flow charts and time line illustrations for hardware generations affected by which bugs color coded by security implication sorted by deployment concerns (desktop/workstation, embedded, virtual machines only, etc).

..mhh Yes, you are somehow right. But according to intel's most recent pr campaign I m very sure that they have a whole department dedicated to find amd bugs. Once they find some holes they will be used to set up a campaign against amd. It wouldn't be the first time for intle to act sneaky.