Originally posted by coder
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VIA CPUs
- CNA (2008) => 6F2 & 6F3 : CentaurHauls Family 6, Model 15, Stepping 2 & 3 AKA VIA Nano 1000/2000 Series, e.g. Nano L2100 - x86-64, SSSE3, 1 MB L2 cache per core, single core, 65nm
- CNB (2009) => 6F8 : CentaurHauls Family 6, Model 15, Stepping 8 AKA VIA Nano 3000 Series, e.g. Nano L3025 - SSE4.1, VIA VT (compatible with Intel VT-X)
- CNC (2011) => 6FA : CentaurHauls Family 6, Model 15, Stepping 10 AKA VIA Nano X2, e.g. Nano X2 L4050 - 2 cores, basically two Nano 3000 in the same die, 40nm
- CNQ (2011) => 6FC & 6FD : CentaurHauls Family 6, Model 15, Stepping 12 & 13) AKA VIA Nano QuadCore, e.g. Nano QuadCore L4650E - 4 cores, basically two Nano X2 in a multi-chip module
- CNR (2015, samples available in 2014) => 6FE (CentaurHauls Family 6, Model 15, Stepping 14) AKA VIA Nano QuadCore, Isaiah II, e.g. Nano QuadCore C4650 - SSE4.2, AVX, AVX2, AES-NI, 2 MB shared L2 cache, 4 cores on a single die, 28nm
- CNS (2019) - AVX-512, NCORE AI coprocessor, 16 MB shared L3 cache, 8 cores, 16nm TSMC
Zhaoxin CPUs
- ZX-A (2014) => CentaurHauls Family 6, Model 15, Stepping 13 (KaiXian ZX-A), e.g. C4350AL - based on VIA CNQ (VIA Nano X2 C4350AL), 40nm TSMC; compatible with VX11(H) (Chrome 640/645 GPU - 3a01)
- ZX-B (2014?) => CentaurHauls Family 6, Model 15, Stepping 13 (KaiXian ZX-B) - the same microarchitecture as ZX-A, 40nm HLMC (different fabrication plant, produced in mainland China)
- ZX-C (2015) => CentaurHauls Family 6, Model 15, Stepping 14 AKA ZhangJiang (KaiXian ZX-C), e.g. C4610 - based on VIA CNR, 2 MB shared L2 cache, 4 cores, 28nm TSMC; compatible with VX11(PH) (Chrome 640/645 GPU - 3a01)
- ZX-C+ (2016) => CentaurHauls Family 6, Model 15, Stepping 14 AKA ZhangJiang (KaiXian ZX-C+ & KaisHeng ZX-C+), e.g. C4701, FC-1081 - SM3, SM4, up to 4 MB shared L2 cache (2 x 2 MB), up to 8 cores (basically two quad-core CPUs in a multi-chip module, similar solution to that used in CNQ); compatible with ZX-100(S) (Chrome 320 GPU - 3a02)
- ZX-D (2017) => CentaurHauls Family 6, Model 31, Stepping 12 AKA WuDaoKou (KaiXian KX-5000 & KaisHeng KH-20000), e.g. KX-U5680, KH-26800 - major redesign, full SoC, new uncore with northbridge moved on-die, new P2P high-speed interconnect crossbar that replaces FSB, PCIe 3.0, DDR4, integrated GPU (Chrome 860 GPU - 3a03), 4 MB L2 cache per cluster (up to 8 MB in total), up to 8 cores (2 quad-core clusters on a single die), 28nm HLMC & SMIC; compatible with ZX-200 (IOE chip for IO extensibility)
- ZX-E (2018) => CentaurHauls Family 7, Model 11, Stepping 0 & 1 & 15 AKA LuJiaZui (KaiXian KX-6000 & KaisHeng KH-30000), e.g. KX-U6880A, KH-37800D - new integrated GPU (Chrome 960 GPU - 3a04), 16nm FF (FinFET) TSMC
- ZX-F (2019) => CentaurHauls Family 6, Model 71 (KaiXian KX-7000 & KaisHeng KH-40000), Stepping 1 - PCIe 4.0 (planned), DDR5 (planned), 16 MB shared L3 cache (confirmed), 7nm TSMC (planned)
I haven't mentioned about the performance boost, but you should know that it is significant.
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