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EPYC 7642/7742 vs. Xeon Platinum 8280 Performance With Intel-Recommended Benchmarks

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  • #21
    Originally posted by c2h5oh View Post
    Better, but likely not better enough - let me explain:

    AMDs major advantage is the modular (chiplet) design that makes the individual components of the CPU small.
    I basically agree with everything you said, but you start from an assumption that you don't know for sure is true. We can't know if Intel has/had chiplets in its mind also.
    But from a uArch point of view, I doubt Intel doesn't have a response or several in place already. In the end, Ice Lake is superior to Zen 2, but indeed, fabrication process and not having chiplets is a big disadvantage for Intel.

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    • #22
      I do hope this "battle" continues with wins on both sides for eons to come.
      Intel needed a punch in the face, but other than that, they contribute a lot to our current open source environment, and I mean a lot.
      AMD needed a big win, here it is. They also contribute a lot to our current open source environment.
      As long as they both contribute the way they do now, I would never feel bad buying mixed.
      In the end, I've never seen my CPU's maxed on my servers.
      And if they ever did, I call the right software developer and help him fix his code.

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      • #23
        Originally posted by yeeeeman View Post
        I basically agree with everything you said, but you start from an assumption that you don't know for sure is true. We can't know if Intel has/had chiplets in its mind also.
        But from a uArch point of view, I doubt Intel doesn't have a response or several in place already. In the end, Ice Lake is superior to Zen 2, but indeed, fabrication process and not having chiplets is a big disadvantage for Intel.
        Intel has been talking about their own modular designs (with EMIB / co-EMIB), but nothing except the weird Intel CPUs with AMD GPUs materialized from it yet as far as actual products are concerned and that one was killed off recently too.

        I'm sure they are at least exploring chiplet design now for server space, but when and if they can deliver is an open question:
        • EMIB in their CPUs with AMD graphics was rumored to have been rather expensive and it only connected two small components - is it large CPU ready and cheap enough?
        • Chiplets introduce latency and Intel CPUs benefited from their fast, low latency memory subsystem. Cores will have to be redesign with that extra (10-20ns) latency in mind (if you wondered why Zen2 has boatloads of L3 cache now you know).
        • Power management changes a lot
        And dozens of other things.

        Anyways, I love that we finally have competition - we've been getting the same Broadwell core, with minor tweaks since for the last 5 years now with prices either staying the same or going up, while manufacturing process matured increasing yields and Intel profits. No major innovation.

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        • #24
          Soon AMD may be offering a novelty gift item consisting of a small glass vial containing a ground up Intel Scalable Xeon die.
          Last edited by hoohoo; 30 October 2019, 12:53 PM. Reason: Grammar fail.

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          • #25
            Originally posted by archsway View Post
            Wintel is still going strong:


            ...it is not commercial shrink-wrapped software available to everyone.
            LMAO, Intel. It's open source shrink-wrapped software available to everyone!

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            • #26
              Originally posted by yeeeeman View Post
              I basically agree with everything you said, but you start from an assumption that you don't know for sure is true. We can't know if Intel has/had chiplets in its mind also.
              But from a uArch point of view, I doubt Intel doesn't have a response or several in place already. In the end, Ice Lake is superior to Zen 2, but indeed, fabrication process and not having chiplets is a big disadvantage for Intel.
              Indeed. OTOH we know Intel that has good MCM interconnect packaging that would support it in implementing a chiplet scheme.

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