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The Linux Kernel Is Preparing To Enable 5-Level Paging By Default

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  • #21
    Only 4 PiB? Apparently I'm going to have to downgrade my laptop. Not sure how I will run Chrome with 8 trillion open tabs all streaming Netflix now. Never going to get through all the episodes of It's Always Sunny in Philadelphia at this rate.

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    • #22
      Intel's 5-level paging works by extending the size of virtual addresses to 57 bits from 48 bits.
      wait, how does that work, why so uneven amount of bytes?

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      • #23
        I guess intel is aligning industry the wrong way yet again. Paging for paging for paging for paging.

        IMOSNSHO, instead of making more nested page levels of fixed size pages, 4K-aligned extents should just be introduced to the page management 'API', along with 'interrupts' to make OS kernel (re)designate a block of physical RAM for CPU paging operations. Per paging namespace (CPL or VM nesting).

        Then CPUs would be able to arrange MM internally any way they want (direct extent based MMU operations and xlate caching, or 3 levels of fixed pages, 100 levels, 100500 levels, whatever). This will give enough flexibility and compatibility, while simplifying software based memory managing logic at the same time. Huge sized pages transparency issue goes here as well.
        Last edited by Alex/AT; 09-15-2019, 05:12 AM.

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        • #24
          Originally posted by andyprough View Post
          Only 4 PiB? Apparently I'm going to have to downgrade my laptop. Not sure how I will run Chrome with 8 trillion open tabs all streaming Netflix now. Never going to get through all the episodes of It's Always Sunny in Philadelphia at this rate.
          It's only a matter of time. My first laptop had 16 MB of RAM (in 1997). Now my latest laptop has had 32 GB for almost a year now. Probably will take a similar amount of time (20 years) to reach 32 TB of RAM on every laptop. It's easy to imagine even small workstation and servers will have 10-100 times more capacity.

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          • #25
            Originally posted by torsionbar28 View Post
            Ok, so with "some vendors" hitting 64 TiB of physical memory, that must mean either 14 sockets of latest Xeon Platinum, or 32 sockets of EPYC. That's a huge machine, something in the class of an HP Superdome. IME, those types of machines typically support hardware partitioning, so they rarely run a single OS instance. In my 10 years of working on Superdome (and AlphaServer GS before that) I don't think I ran into even a single customer who was running a single OS instance across all the sockets. I guess I can see the need to increase this memory limit, but we're talking very niche use case right now.
            Well you know, it takes years to get these things in mainline. Linux is still struggling with the year 2038 problem. It will still take 10 years until all enterprise distros are year 2038 compatible, that is, in 2029. Some unlucky customers might still be running RHEL 6 with 2.6 kernels when the Y2038 problem kicks in. Probably some embedded systems will run Linux 2.2 in 2040.

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            • #26
              I'm glad this is happening. I've heard complaints from people that 48 bits is not enough for big servers, and getting closer to a 64 bit CPU with 64 bit address space is nice. Right now, I don't need that much memory, but I'm glad Intel is trying to make it possible. I also hope this won't affect older hardware without the support, as there's plenty of it out there, and most people won't need 5 level paging for some time.

              I'm interested how this affects software that takes advantage of tagged pointers. Most x86_64 code assumes the address space is at most 48 bits, so 16 bits are always available for tags. Will this break v8, or cause performance regressions?

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              • #27
                I know this is about servers, but I'm going to leave this here anyway:
                All the memory I have owned over the past 20 years or so, combined, does not come close to the current limits

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                • #28
                  Originally posted by yoshi314 View Post
                  wait, how does that work, why so uneven amount of bytes?
                  The Initial AMD64 spec is 4 level paging with 48-bit effective virtual addresses.
                  • Pages are 4096 bytes = 2^12, so 12 bits of the address select a byte within a single page.
                  • That leaves 36 bits of address. Each level of paging indexes into a 512 entry table. 512 = 2^9, so 9 bits per level.
                  • 12 + 9 * 4 = 48
                  • Five level paging adds another set of tables, so we go to 12 + 9 * 5 = 57.
                  I doubt we would have gotten exactly this system from a completely clean design, but this is a very reasonable progression from the way 32-bit x86 two level paging works (12 + 2*10 = 32; pages were still 4k; each table was 1024 entries).

                  Six level paging will be interesting. 12 + 9 * 6 = 66, so the final level of tables will only be 1/4th full. This will waste several kilobytes of memory for every process running on the system.
                  Last edited by NatTuck; 09-15-2019, 10:07 AM.

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                  • #29
                    Originally posted by wizard69 View Post
                    On the surface this sounds like absolute insanity. We are talking about 64 bit processors here, why would you need more than two levels of paging. Maybe I’m missing something (totally possible) but with the two address ranges, virtual and hardware it would seem like the goal should have been to reduce the number of paving levels.
                    Your technical incompetence is astounding given how much bullshit you always spew about 64-bit and "removing cruft" in general.

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                    • #30
                      Originally posted by caligula View Post
                      It's only a matter of time. My first laptop had 16 MB of RAM (in 1997). Now my latest laptop has had 32 GB for almost a year now. Probably will take a similar amount of time (20 years) to reach 32 TB of RAM on every laptop. It's easy to imagine even small workstation and servers will have 10-100 times more capacity.
                      There's a thing called physical limits.

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