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Intel Itanium IA-64 Support To Be Deprecated By GCC 10, Planned Removal In GCC 11

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  • #11
    Originally posted by stormcrow View Post

    In ten years you'll still have those containers running on whatever hardware they moved it to, probably with only difference is whatever they've replaced failed hardware in that intervening period. It's also just as likely those old Itanium servers will still be in use because no one in management wants to either spend money on migration, or none of the IT support staff want to wake the sleeping giant of problems trying to replace legacy hardware can cause. Like the IRS is still using decades old IBM mainframes, and companies still using old punch card calculator systems. If it's not broke, don't run the risk of "fixing it" and having a technical catastrophe (failed/inept migration) and/or political nightmare on your head (raising taxes to pay for it and/or major budget increases to management-voters-shareholders).

    https://www.nextgov.com/cio-briefing...rnment/128599/
    https://www.pcworld.com/article/2499...use-today.html

    If these aren't public facing systems, there's usually not any real risk to leaving them alone other than hardware failure.
    even then, the older the system, the less likely it is to fail, we've still got a HP 1000 chugging along here. :^)

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    • #12
      The Itanic will be remembered as one of the worst ideas in CPU design history, with a botched implementation to match.

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      • #13
        I've misread your message as follows:
        Originally posted by stormcrow View Post
        management-voters-slashdotters

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        • #14
          Originally posted by jacob View Post
          The Itanic will be remembered as one of the worst ideas in CPU design history, with a botched implementation to match.
          Lest we forget iAPX 432… 😏

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          • #15
            Originally posted by HyperDrive View Post
            Lest we forget iAPX 432… 😏
            All right, that was a turkey, but it was not an inherently silly concept like the Itanium.

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            • #16
              Originally posted by jacob View Post
              All right, that was a turkey, but it was not an inherently silly concept like the Itanium.
              I guess we could say iAPX 432 was too CISCy, while IA-64 was too RISCy. History shows that the sweet spot lies somewhere between the two philosophies.

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              • #17
                Originally posted by HyperDrive View Post
                Lest we forget iAPX 432… 😏
                Yeah, intel really does not have a "stellar" history of introducing new CPU architectures or product lines. I know a lot of users where burned, when they abandoned the i960 and the StrongARM/XScale basically overnight in both cases. At this point I will personally only trust intel to keep making i86 CPUs...

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                • #18
                  Originally posted by HyperDrive View Post
                  I guess we could say iAPX 432 was too CISCy, while IA-64 was too RISCy. History shows that the sweet spot lies somewhere between the two philosophies.
                  I think if you want high performance, the sweet spot is a CISC instruction set dynamically translated and executed on an internal RISC core. That's what modern CPUs do. For low cost/low power consumption, RISC is great. The iAPX432 was extremely complex and at the same time, it always looked like a solution in search of a problem.

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                  • #19
                    Originally posted by jacob View Post
                    The Itanic will be remembered as one of the worst ideas in CPU design history, with a botched implementation to match.
                    ONE of the worst? It was several of the worst ideas put together, with a few good ideas thrown in as garnish.

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                    • #20
                      Originally posted by HyperDrive View Post
                      Lest we forget iAPX 432… 😏
                      OMG.. WTF? I never even heard of it, and it is absolutely gloriously insane:

                      Instruction length: 6 to 321 bits.. yes, bit aligned
                      Object oriented instructions... Yes really
                      Hardware defined and enforced software data types....
                      Hardware garbage collection........

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