Announcement

**wizard69** · 27 February 2019, 05:25 AM

Cool!

it does make me wonder what sort of performance gains we will see from those two instructions if any.

**pegasus** · 27 February 2019, 06:05 AM

Depending on your workloads. But if you deal with something memory io heavy, like juggling matrices, my guess would be "measurable gains".

**yurikoles** · 27 February 2019, 07:53 AM

Michael why links to old mirror? Official repo links would be:

[X86] AMD znver2 enablement · llvm/llvm-project@4f171d2

https://github.com/llvm/llvm-project/commit/4f171d2761753a7664ddcc27cdd53770c6e59d7c

This patch enables the following 1) AMD family 17h "znver2" tune flag (-march, -mcpu). 2) ISAs that are enabled for "znver2" architecture. 3) For the time being, it uses the zn...

[X86] AMD znver2 enablement · llvm/llvm-project@e172d70

https://github.com/llvm/llvm-project/commit/e172d7008d0c12eaa9ee2aee16ee4e13c176553c

This patch enables the following 1) AMD family 17h "znver2" tune flag (-march, -mcpu). 2) ISAs that are enabled for "znver2" architecture. 3) For the time being, it uses the zn...

Announcement

AMD Zen 2 "znver2" Support Lands In LLVM Clang 9.0

AMD Zen 2 "znver2" Support Lands In LLVM Clang 9.0

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